Off by 0.1mm in allowed thickness calculations for input module

[cscott]

Between the spacer dimensions in Mechanical/Small/Module/c1_design_space_ref.pdf and the PCB limit area dimensions in Mechanical/Small/PCB/c1_pcb_concept_design_ref.pdf there appears to be an "off by 0.1mm" error, caused by double-counting the 0.1mm difference between the nominal 0.9mm thickness of the top edge alignment feature and the 0.8mm thickness of the PCB (and this applies also for the "1.0 mm thick PCB" variant, which appears to be based on the 0.8mm thick PCB and assumes the top edge of the PCB is milled down 0.2mm, and so inherits the mistake from the 0.8mm PCB design).

There appears to be /second/ 0.1mm of "clearance" in the PCB design.

Apologies for lack of a diagram, here's the pure math. Starting from the non-PCB design, which appears to match the actual production spacer hardware I have in measuring 2.35mm thick at the top edge, with an alignment feature 0.9mm thick, and installed it sits flush with the keyboard lattice. Starting from the midplate and working up, that 2.35mm of thickness is divided up as:

• 0.50mm below the top edge alignment feature
• 0.90mm for the top edge alignment feature
• 0.95mm above the top edge alignment feature

(The c1_design_space_ref.pdf implicitly indicates 0.95 for the top edge feature and explicitly marks 0.90 above it, but (a) that doesn't match the production spacer I measured, and (b) it doesn't affect this next stackup which is keyed off the /bottom/ of the alignment feature.)

The stack up for the PCB design should be, I believe:

• 0.1mm of "clearance" below bottom-side components <- this is not indicated
• 0.4mm for bottom-side components
• 0.8mm for the PCB, sitting flush to the bottom of the 0.9mm allowance for the alignment feature
• 1.05mm above the top of the PCB <- this is the error, it is marked as 0.95mm

Whichever correction is applied to the 0.8mm PCB drawing would need to be applied to the 1.0mm PCB drawing as well; most likely the top side clearances for both would be bumped up by 0.1mm: 0.85mm "flush to lattice" for the 1.0mm PCB and 1.05mm "flush to lattice" for the 0.8mm PCB, and the "flush to C deck" numbers bumped as well.

It seems that the root cause here was not taking account the 0.1mm thickness difference between the 0.8mm PCB and the nominal 0.9mm alignment feature in recomputing the top side allowances.

The "0.1mm of clearance below bottom side components" is also not clearly marked on the PCB-concept drawings, but is easily inferred from the "0.5t spacer" which is marked. If the spacer is 0.5mm tall and there is only 0.4mm height allowance for bottom-side components, the difference must be due to an undocumented clearance provided; especially since the non-PCB CAD drawing clearly indicates 0.5mm thickness below the alignment feature for that entire portion.

I'm certain this is splitting hairs, but I'm posting this in case it helps other folks staring at the top sets of CAD design files and trying to make the numbers add up. The allowed thickness above the PCB has been a recurrent concern for input module design (especially in the keyboard area!) so I'm sure the additional 0.1mm will be welcomed by some. :) Certainly I'd appreciate confirmation that my understanding is correct.

[cscott]

(If my understanding is correct, there's another interesting PCB stackup as well which would provide an additional 0.4mm assuming no bottom-side components in the top portion of the input module: a 0.4mm PCB (still readily commercially available) could sit below two additional PCBs attached with (say) castellated edges: a 0.8mm PCB layered at the top edge would engage the alignment mechanism, and a 0.4mm-1.8mm (!) PCB layered on the bottom edge would contain the pogo pin pads. I might explore that for my keyboard stackups. But that's a latent feature to be discovered, not a bug! :) )