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fix llvm#2: negative offset, non-immediate operand
1 parent 3b992b2 commit 02e72d2

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1 file changed

+11
-5
lines changed

1 file changed

+11
-5
lines changed

llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -768,10 +768,15 @@ class AArch64LFIELFStreamer : public AArch64ELFStreamer {
768768
if (IsPrePost) {
769769
emitSafeMemDemoted(BaseRegIdx, Inst, STI);
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MCRegister Base = Inst.getOperand(BaseRegIdx).getReg();
771-
if (Inst.getOperand(OffsetIdx).isReg())
772-
emitRRRI(AArch64::ADDXrs, Base, Base, Inst.getOperand(OffsetIdx).getReg(), 0, STI); // TODO: bug?
773-
else
774-
emitRRI0(AArch64::ADDXri, Base, Base, Inst.getOperand(OffsetIdx).getImm() * getPrePostScale(Inst.getOpcode()), STI);
771+
if (Inst.getOperand(OffsetIdx).isReg()) {
772+
emitRRRI(AArch64::ADDXrs, Base, Base, Inst.getOperand(OffsetIdx).getReg(), 0, STI);
773+
} else {
774+
auto Offset = Inst.getOperand(OffsetIdx).getImm() * getPrePostScale(Inst.getOpcode());
775+
if (Offset >= 0)
776+
emitRRI0(AArch64::ADDXri, Base, Base, Offset, STI);
777+
else
778+
emitRRI0(AArch64::SUBXri, Base, Base, -Offset, STI);
779+
}
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} else {
776781
emitSafeMemN(BaseRegIdx, Inst, STI);
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}
@@ -784,7 +789,8 @@ class AArch64LFIELFStreamer : public AArch64ELFStreamer {
784789
AArch64ELFStreamer::emitInstruction(Inst, STI);
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return;
786791
}
787-
if (Inst.getOperand(2).getImm() == 0) {
792+
auto OffsetMCO = Inst.getOperand(2);
793+
if (OffsetMCO.isImm() && OffsetMCO.getImm() == 0) {
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emitMemMask(MemOp, Inst.getOperand(0).getReg(), Inst.getOperand(1).getReg(), STI);
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} else {
790796
emitAddMask(Inst.getOperand(1).getReg(), STI);

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