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[CIR] Emit bitcast for equal-width types #1991
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Implement VisitAsTypeExpr to lower AsTypeExpr expressions. - Emit an error when source and destination types differ in bitwidth. - When types already match, return the source value (no-op). - Otherwise lower to a CIR bitcast using cir::CastOp with CastKind::bitcast.
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I normally don't do code reviews, but you should follow the skeleton for this function from OG codegen — see. We try not to deviate too much from it unless there's a strong enough reason for that.
| @@ -0,0 +1,9 @@ | |||
| // RUN: %clang -target x86_64-unknown-linux-gnu -cl-std=CL3.0 -Xclang -finclude-default-header -Xclang -fclangir -emit-cir %s -o - | FileCheck %s | |||
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Few comments regarding testing (Do we have documentation on this? @bcardosolopes)
Your tests should ideally check for the three things:
- CIR block: Tests your lowering to MLIR CIR dialect (
-fclangir -emit-cir) - LLVM block: Tests lowering to LLVM IR through the CIR pipeline (
-fclangir -emit-llvm) - OGCG block: Tests lowering through the OG pipeline (no
-fclangir). This confirms parity with OG.
For reference, see the CUDA tests: https://github.com/llvm/clangir/blob/main/clang/test/CIR/CodeGen/CUDA/builtins-nvptx-ptx60.cu
For AsTypeExpr, the OG test suite is here: https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGenOpenCL/as_type.cl
I would suggest you try to replicate what is supported as much as possible for it.
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We don't have text for it in clangir.org unfortunately, if you'd like to contrib some all is needed is a PR against branch gh-pages? There's a placeholder here: https://llvm.github.io/clangir/GettingStarted/coding-guideline.html
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We don't have text for it in clangir.org unfortunately, if you'd like to contrib some all is needed is a PR against branch gh-pages? There's a placeholder here: https://llvm.github.io/clangir/GettingStarted/coding-guideline.html
Sweet — I'll definitely do that when I have time
Please do whenever you feel like, we really appreciate it :) |
This patch adds support for emitting a
cir.bitcastwhen reinterpretingvalues that have the same bit-width. This enables correct handling of
vector reinterpretation in CIR and aligns with the behavior of the LLVM IR
lowering.
Previously, equal-width reinterpretations were not handled, which caused
assertions or incorrect lowering when working with vector types or other
equal-sized aggregates.
Key points:
cir.bitcastemission when source and destination types haveequal width and only reinterpretation is required.
current type conversion pipeline.
Testing: