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76 | 76 | compatible = "nxp,imx-dtcm"; |
77 | 77 | reg = <0x20000000 DT_SIZE_K(256)>; |
78 | 78 | }; |
| 79 | + |
| 80 | + irqsteer: interrupt-controller@44690000 { |
| 81 | + compatible = "nxp,irqsteer-intc"; |
| 82 | + #size-cells = <0>; |
| 83 | + #address-cells = <1>; |
| 84 | + reg = <0x44690000 DT_SIZE_K(64)>; |
| 85 | + irq_offset = <238>; |
| 86 | + irqs_num = <960>; |
| 87 | + |
| 88 | + irqsteer_master0: interrupt-controller@0 { |
| 89 | + compatible = "nxp,irqsteer-master"; |
| 90 | + reg = <0>; |
| 91 | + interrupt-controller; |
| 92 | + #interrupt-cells = <2>; |
| 93 | + interrupts-extended = <&nvic 224 0>; |
| 94 | + }; |
| 95 | + |
| 96 | + irqsteer_master1: interrupt-controller@1 { |
| 97 | + compatible = "nxp,irqsteer-master"; |
| 98 | + reg = <1>; |
| 99 | + interrupt-controller; |
| 100 | + #interrupt-cells = <2>; |
| 101 | + interrupts-extended = <&nvic 225 0>; |
| 102 | + }; |
| 103 | + |
| 104 | + irqsteer_master2: interrupt-controller@2 { |
| 105 | + compatible = "nxp,irqsteer-master"; |
| 106 | + reg = <2>; |
| 107 | + interrupt-controller; |
| 108 | + #interrupt-cells = <2>; |
| 109 | + interrupts-extended = <&nvic 226 0>; |
| 110 | + }; |
| 111 | + |
| 112 | + irqsteer_master3: interrupt-controller@3 { |
| 113 | + compatible = "nxp,irqsteer-master"; |
| 114 | + reg = <3>; |
| 115 | + interrupt-controller; |
| 116 | + #interrupt-cells = <2>; |
| 117 | + interrupts-extended = <&nvic 227 0>; |
| 118 | + }; |
| 119 | + |
| 120 | + irqsteer_master4: interrupt-controller@4 { |
| 121 | + compatible = "nxp,irqsteer-master"; |
| 122 | + reg = <4>; |
| 123 | + interrupt-controller; |
| 124 | + #interrupt-cells = <2>; |
| 125 | + interrupts-extended = <&nvic 228 0>; |
| 126 | + }; |
| 127 | + |
| 128 | + irqsteer_master5: interrupt-controller@5 { |
| 129 | + compatible = "nxp,irqsteer-master"; |
| 130 | + reg = <5>; |
| 131 | + interrupt-controller; |
| 132 | + #interrupt-cells = <2>; |
| 133 | + interrupts-extended = <&nvic 229 0>; |
| 134 | + }; |
| 135 | + |
| 136 | + irqsteer_master6: interrupt-controller@6 { |
| 137 | + compatible = "nxp,irqsteer-master"; |
| 138 | + reg = <6>; |
| 139 | + interrupt-controller; |
| 140 | + #interrupt-cells = <2>; |
| 141 | + interrupts-extended = <&nvic 230 0>; |
| 142 | + }; |
| 143 | + |
| 144 | + irqsteer_master7: interrupt-controller@7 { |
| 145 | + compatible = "nxp,irqsteer-master"; |
| 146 | + reg = <7>; |
| 147 | + interrupt-controller; |
| 148 | + #interrupt-cells = <2>; |
| 149 | + interrupts-extended = <&nvic 231 0>; |
| 150 | + }; |
| 151 | + |
| 152 | + irqsteer_master8: interrupt-controller@8 { |
| 153 | + compatible = "nxp,irqsteer-master"; |
| 154 | + reg = <8>; |
| 155 | + interrupt-controller; |
| 156 | + #interrupt-cells = <2>; |
| 157 | + interrupts-extended = <&nvic 232 0>; |
| 158 | + }; |
| 159 | + |
| 160 | + irqsteer_master9: interrupt-controller@9 { |
| 161 | + compatible = "nxp,irqsteer-master"; |
| 162 | + reg = <9>; |
| 163 | + interrupt-controller; |
| 164 | + #interrupt-cells = <2>; |
| 165 | + interrupts-extended = <&nvic 233 0>; |
| 166 | + }; |
| 167 | + |
| 168 | + irqsteer_master10: interrupt-controller@10 { |
| 169 | + compatible = "nxp,irqsteer-master"; |
| 170 | + reg = <10>; |
| 171 | + interrupt-controller; |
| 172 | + #interrupt-cells = <2>; |
| 173 | + interrupts-extended = <&nvic 234 0>; |
| 174 | + }; |
| 175 | + |
| 176 | + irqsteer_master11: interrupt-controller@11 { |
| 177 | + compatible = "nxp,irqsteer-master"; |
| 178 | + reg = <11>; |
| 179 | + interrupt-controller; |
| 180 | + #interrupt-cells = <2>; |
| 181 | + interrupts-extended = <&nvic 235 0>; |
| 182 | + }; |
| 183 | + |
| 184 | + irqsteer_master12: interrupt-controller@12 { |
| 185 | + compatible = "nxp,irqsteer-master"; |
| 186 | + reg = <12>; |
| 187 | + interrupt-controller; |
| 188 | + #interrupt-cells = <2>; |
| 189 | + interrupts-extended = <&nvic 236 0>; |
| 190 | + }; |
| 191 | + }; |
79 | 192 | }; |
80 | 193 |
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81 | 194 | mailbox_m70_m71_for_m71_as_master: ipm-mbox8 { |
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