54L CLOCK: Account for relationship between PLLs and XO

Be a bit more precise accounting for the relationship between
both PLLs (128 and 24MHz) and the HFXO, and with it generate
the XOTUNED event after either is requested only if the HFXO was
not already up.

Signed-off-by: Alberto Escolar Piedras <[email protected]>

Author: aescolar