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mstasiaknordicanangl
mstasiaknordic
authored and
anangl
committed
nrfx: update MDK to 8.72.3
Updated MDK to version 8.72.3 with changes related to nRF54LV10A EngA SoC. Signed-off-by: Michał Stasiak <[email protected]>
1 parent 54f33f1 commit d0cef23

13 files changed

+7550
-3167
lines changed

‎nrfx/drivers/include/nrfx_power_compat.h‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,18 +48,90 @@
4848
#if NRF_REGULATORS_HAS_POF
4949

5050
typedef nrf_regulators_pof_thr_t nrf_power_pof_thr_t;
51+
#if defined(REGULATORS_POFCON_THRESHOLD_V090)
52+
#define NRF_POWER_POFTHR_V09 NRF_REGULATORS_POF_THR_0V9
53+
#endif
54+
#if defined(REGULATORS_POFCON_THRESHOLD_V095)
55+
#define NRF_POWER_POFTHR_V095 NRF_REGULATORS_POF_THR_0V95
56+
#endif
57+
#if defined(REGULATORS_POFCON_THRESHOLD_V100)
58+
#define NRF_POWER_POFTHR_V10 NRF_REGULATORS_POF_THR_1V0
59+
#endif
60+
#if defined(REGULATORS_POFCON_THRESHOLD_V105)
61+
#define NRF_POWER_POFTHR_V105 NRF_REGULATORS_POF_THR_1V05
62+
#endif
63+
#if defined(REGULATORS_POFCON_THRESHOLD_V110)
64+
#define NRF_POWER_POFTHR_V11 NRF_REGULATORS_POF_THR_1V1
65+
#endif
66+
#if defined(REGULATORS_POFCON_THRESHOLD_V115)
67+
#define NRF_POWER_POFTHR_V115 NRF_REGULATORS_POF_THR_1V15
68+
#endif
69+
#if defined(REGULATORS_POFCON_THRESHOLD_V120)
70+
#define NRF_POWER_POFTHR_V12 NRF_REGULATORS_POF_THR_1V2
71+
#endif
72+
#if defined(REGULATORS_POFCON_THRESHOLD_V125)
73+
#define NRF_POWER_POFTHR_V125 NRF_REGULATORS_POF_THR_1V25
74+
#endif
75+
#if defined(REGULATORS_POFCON_THRESHOLD_V130)
76+
#define NRF_POWER_POFTHR_V13 NRF_REGULATORS_POF_THR_1V3
77+
#endif
78+
#if defined(REGULATORS_POFCON_THRESHOLD_V135)
79+
#define NRF_POWER_POFTHR_V135 NRF_REGULATORS_POF_THR_1V35
80+
#endif
81+
#if defined(REGULATORS_POFCON_THRESHOLD_V140)
82+
#define NRF_POWER_POFTHR_V14 NRF_REGULATORS_POF_THR_1V4
83+
#endif
84+
#if defined(REGULATORS_POFCON_THRESHOLD_V145)
85+
#define NRF_POWER_POFTHR_V145 NRF_REGULATORS_POF_THR_1V45
86+
#endif
87+
#if defined(REGULATORS_POFCON_THRESHOLD_V150)
88+
#define NRF_POWER_POFTHR_V15 NRF_REGULATORS_POF_THR_1V5
89+
#endif
90+
#if defined(REGULATORS_POFCON_THRESHOLD_V155)
91+
#define NRF_POWER_POFTHR_V155 NRF_REGULATORS_POF_THR_1V55
92+
#endif
93+
#if defined(REGULATORS_POFCON_THRESHOLD_V160)
94+
#define NRF_POWER_POFTHR_V16 NRF_REGULATORS_POF_THR_1V6
95+
#endif
96+
#if defined(REGULATORS_POFCON_THRESHOLD_V165)
97+
#define NRF_POWER_POFTHR_V165 NRF_REGULATORS_POF_THR_1V65
98+
#endif
99+
#if defined(REGULATORS_POFCON_THRESHOLD_V17)
51100
#define NRF_POWER_POFTHR_V17 NRF_REGULATORS_POF_THR_1V7
101+
#endif
102+
#if defined(REGULATORS_POFCON_THRESHOLD_V18)
52103
#define NRF_POWER_POFTHR_V18 NRF_REGULATORS_POF_THR_1V8
104+
#endif
105+
#if defined(REGULATORS_POFCON_THRESHOLD_V19)
53106
#define NRF_POWER_POFTHR_V19 NRF_REGULATORS_POF_THR_1V9
107+
#endif
108+
#if defined(REGULATORS_POFCON_THRESHOLD_V20)
54109
#define NRF_POWER_POFTHR_V20 NRF_REGULATORS_POF_THR_2V0
110+
#endif
111+
#if defined(REGULATORS_POFCON_THRESHOLD_V21)
55112
#define NRF_POWER_POFTHR_V21 NRF_REGULATORS_POF_THR_2V1
113+
#endif
114+
#if defined(REGULATORS_POFCON_THRESHOLD_V22)
56115
#define NRF_POWER_POFTHR_V22 NRF_REGULATORS_POF_THR_2V2
116+
#endif
117+
#if defined(REGULATORS_POFCON_THRESHOLD_V23)
57118
#define NRF_POWER_POFTHR_V23 NRF_REGULATORS_POF_THR_2V3
119+
#endif
120+
#if defined(REGULATORS_POFCON_THRESHOLD_V24)
58121
#define NRF_POWER_POFTHR_V24 NRF_REGULATORS_POF_THR_2V4
122+
#endif
123+
#if defined(REGULATORS_POFCON_THRESHOLD_V25)
59124
#define NRF_POWER_POFTHR_V25 NRF_REGULATORS_POF_THR_2V5
125+
#endif
126+
#if defined(REGULATORS_POFCON_THRESHOLD_V26)
60127
#define NRF_POWER_POFTHR_V26 NRF_REGULATORS_POF_THR_2V6
128+
#endif
129+
#if defined(REGULATORS_POFCON_THRESHOLD_V27)
61130
#define NRF_POWER_POFTHR_V27 NRF_REGULATORS_POF_THR_2V7
131+
#endif
132+
#if defined(REGULATORS_POFCON_THRESHOLD_V28)
62133
#define NRF_POWER_POFTHR_V28 NRF_REGULATORS_POF_THR_2V8
134+
#endif
63135

64136
#if NRF_REGULATORS_HAS_POF_VDDH
65137

‎nrfx/drivers/src/nrfx_power.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -224,7 +224,11 @@ void nrfx_power_pof_disable(void)
224224
#elif NRF_REGULATORS_HAS_POF
225225
nrf_regulators_pof_config_t pof_config = {
226226
.enable = false,
227+
#if defined(REGULATORS_POFCON_THRESHOLD_V27)
227228
.thr = NRF_REGULATORS_POF_THR_2V7,
229+
#else
230+
.thr = NRF_REGULATORS_POF_THR_1V4,
231+
#endif
228232
};
229233
nrf_regulators_pof_config_set(NRF_REGULATORS, &pof_config);
230234
#endif

‎nrfx/hal/nrf_regulators.h‎

Lines changed: 141 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,13 @@ extern "C" {
133133
#define NRF_REGULATORS_HAS_INDUCTOR_DET 0
134134
#endif
135135

136+
#if defined(REGULATORS_HIBERNATOR_SYSTEMHIBERNATE_ResetValue) || defined(__NRFX_DOXYGEN__)
137+
/** @brief Symbol indicating whether HIBERNATOR register is present. */
138+
#define NRF_REGULATORS_HAS_HIBERNATOR 1
139+
#else
140+
#define NRF_REGULATORS_HAS_HIBERNATOR 0
141+
#endif
142+
136143
#if NRF_REGULATORS_HAS_VREG_ANY
137144
/** @brief Voltage regulators. */
138145
typedef enum
@@ -156,22 +163,90 @@ typedef enum
156163
/** @brief POF Comparator thresholds. */
157164
typedef enum
158165
{
166+
#if defined(REGULATORS_POFCON_THRESHOLD_V090) || defined(__NRFX_DOXYGEN__)
167+
NRF_REGULATORS_POF_THR_0V9 = REGULATORS_POFCON_THRESHOLD_V090, ///< Set threshold to 0.9 V.
168+
#endif
169+
#if defined(REGULATORS_POFCON_THRESHOLD_V095) || defined(__NRFX_DOXYGEN__)
170+
NRF_REGULATORS_POF_THR_0V95 = REGULATORS_POFCON_THRESHOLD_V095, ///< Set threshold to 0.95 V.
171+
#endif
172+
#if defined(REGULATORS_POFCON_THRESHOLD_V100) || defined(__NRFX_DOXYGEN__)
173+
NRF_REGULATORS_POF_THR_1V0 = REGULATORS_POFCON_THRESHOLD_V100, ///< Set threshold to 1.0 V.
174+
#endif
175+
#if defined(REGULATORS_POFCON_THRESHOLD_V105) || defined(__NRFX_DOXYGEN__)
176+
NRF_REGULATORS_POF_THR_1V05 = REGULATORS_POFCON_THRESHOLD_V105, ///< Set threshold to 1.05 V.
177+
#endif
178+
#if defined(REGULATORS_POFCON_THRESHOLD_V110) || defined(__NRFX_DOXYGEN__)
179+
NRF_REGULATORS_POF_THR_1V1 = REGULATORS_POFCON_THRESHOLD_V110, ///< Set threshold to 1.1 V.
180+
#endif
181+
#if defined(REGULATORS_POFCON_THRESHOLD_V115) || defined(__NRFX_DOXYGEN__)
182+
NRF_REGULATORS_POF_THR_1V15 = REGULATORS_POFCON_THRESHOLD_V115, ///< Set threshold to 1.15 V.
183+
#endif
184+
#if defined(REGULATORS_POFCON_THRESHOLD_V120) || defined(__NRFX_DOXYGEN__)
185+
NRF_REGULATORS_POF_THR_1V2 = REGULATORS_POFCON_THRESHOLD_V120, ///< Set threshold to 1.2 V.
186+
#endif
187+
#if defined(REGULATORS_POFCON_THRESHOLD_V125) || defined(__NRFX_DOXYGEN__)
188+
NRF_REGULATORS_POF_THR_1V25 = REGULATORS_POFCON_THRESHOLD_V125, ///< Set threshold to 1.25 V.
189+
#endif
190+
#if defined(REGULATORS_POFCON_THRESHOLD_V130) || defined(__NRFX_DOXYGEN__)
191+
NRF_REGULATORS_POF_THR_1V3 = REGULATORS_POFCON_THRESHOLD_V130, ///< Set threshold to 1.3 V.
192+
#endif
193+
#if defined(REGULATORS_POFCON_THRESHOLD_V135) || defined(__NRFX_DOXYGEN__)
194+
NRF_REGULATORS_POF_THR_1V35 = REGULATORS_POFCON_THRESHOLD_V135, ///< Set threshold to 1.35 V.
195+
#endif
196+
#if defined(REGULATORS_POFCON_THRESHOLD_V140) || defined(__NRFX_DOXYGEN__)
197+
NRF_REGULATORS_POF_THR_1V4 = REGULATORS_POFCON_THRESHOLD_V140, ///< Set threshold to 1.4 V.
198+
#endif
199+
#if defined(REGULATORS_POFCON_THRESHOLD_V145) || defined(__NRFX_DOXYGEN__)
200+
NRF_REGULATORS_POF_THR_1V45 = REGULATORS_POFCON_THRESHOLD_V145, ///< Set threshold to 1.45 V.
201+
#endif
202+
#if defined(REGULATORS_POFCON_THRESHOLD_V150) || defined(__NRFX_DOXYGEN__)
203+
NRF_REGULATORS_POF_THR_1V5 = REGULATORS_POFCON_THRESHOLD_V150, ///< Set threshold to 1.5 V.
204+
#endif
205+
#if defined(REGULATORS_POFCON_THRESHOLD_V155) || defined(__NRFX_DOXYGEN__)
206+
NRF_REGULATORS_POF_THR_1V55 = REGULATORS_POFCON_THRESHOLD_V155, ///< Set threshold to 1.55 V.
207+
#endif
208+
#if defined(REGULATORS_POFCON_THRESHOLD_V160) || defined(__NRFX_DOXYGEN__)
209+
NRF_REGULATORS_POF_THR_1V6 = REGULATORS_POFCON_THRESHOLD_V160, ///< Set threshold to 1.6 V.
210+
#endif
211+
#if defined(REGULATORS_POFCON_THRESHOLD_V165) || defined(__NRFX_DOXYGEN__)
212+
NRF_REGULATORS_POF_THR_1V65 = REGULATORS_POFCON_THRESHOLD_V165, ///< Set threshold to 1.65 V.
213+
#endif
159214
#if defined(REGULATORS_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
160-
NRF_REGULATORS_POF_THR_1V7 = REGULATORS_POFCON_THRESHOLD_V17, ///< Set threshold to 1.7 V.
215+
NRF_REGULATORS_POF_THR_1V7 = REGULATORS_POFCON_THRESHOLD_V17, ///< Set threshold to 1.7 V.
161216
#endif
162217
#if defined(REGULATORS_POFCON_THRESHOLD_V18) || defined(__NRFX_DOXYGEN__)
163-
NRF_REGULATORS_POF_THR_1V8 = REGULATORS_POFCON_THRESHOLD_V18, ///< Set threshold to 1.8 V.
164-
#endif
165-
NRF_REGULATORS_POF_THR_1V9 = REGULATORS_POFCON_THRESHOLD_V19, ///< Set threshold to 1.9 V.
166-
NRF_REGULATORS_POF_THR_2V0 = REGULATORS_POFCON_THRESHOLD_V20, ///< Set threshold to 2.0 V.
167-
NRF_REGULATORS_POF_THR_2V1 = REGULATORS_POFCON_THRESHOLD_V21, ///< Set threshold to 2.1 V.
168-
NRF_REGULATORS_POF_THR_2V2 = REGULATORS_POFCON_THRESHOLD_V22, ///< Set threshold to 2.2 V.
169-
NRF_REGULATORS_POF_THR_2V3 = REGULATORS_POFCON_THRESHOLD_V23, ///< Set threshold to 2.3 V.
170-
NRF_REGULATORS_POF_THR_2V4 = REGULATORS_POFCON_THRESHOLD_V24, ///< Set threshold to 2.4 V.
171-
NRF_REGULATORS_POF_THR_2V5 = REGULATORS_POFCON_THRESHOLD_V25, ///< Set threshold to 2.5 V.
172-
NRF_REGULATORS_POF_THR_2V6 = REGULATORS_POFCON_THRESHOLD_V26, ///< Set threshold to 2.6 V.
173-
NRF_REGULATORS_POF_THR_2V7 = REGULATORS_POFCON_THRESHOLD_V27, ///< Set threshold to 2.7 V.
174-
NRF_REGULATORS_POF_THR_2V8 = REGULATORS_POFCON_THRESHOLD_V28, ///< Set threshold to 2.8 V.
218+
NRF_REGULATORS_POF_THR_1V8 = REGULATORS_POFCON_THRESHOLD_V18, ///< Set threshold to 1.8 V.
219+
#endif
220+
#if defined(REGULATORS_POFCON_THRESHOLD_V19) || defined(__NRFX_DOXYGEN__)
221+
NRF_REGULATORS_POF_THR_1V9 = REGULATORS_POFCON_THRESHOLD_V19, ///< Set threshold to 1.9 V.
222+
#endif
223+
#if defined(REGULATORS_POFCON_THRESHOLD_V20) || defined(__NRFX_DOXYGEN__)
224+
NRF_REGULATORS_POF_THR_2V0 = REGULATORS_POFCON_THRESHOLD_V20, ///< Set threshold to 2.0 V.
225+
#endif
226+
#if defined(REGULATORS_POFCON_THRESHOLD_V21) || defined(__NRFX_DOXYGEN__)
227+
NRF_REGULATORS_POF_THR_2V1 = REGULATORS_POFCON_THRESHOLD_V21, ///< Set threshold to 2.1 V.
228+
#endif
229+
#if defined(REGULATORS_POFCON_THRESHOLD_V22) || defined(__NRFX_DOXYGEN__)
230+
NRF_REGULATORS_POF_THR_2V2 = REGULATORS_POFCON_THRESHOLD_V22, ///< Set threshold to 2.2 V.
231+
#endif
232+
#if defined(REGULATORS_POFCON_THRESHOLD_V23) || defined(__NRFX_DOXYGEN__)
233+
NRF_REGULATORS_POF_THR_2V3 = REGULATORS_POFCON_THRESHOLD_V23, ///< Set threshold to 2.3 V.
234+
#endif
235+
#if defined(REGULATORS_POFCON_THRESHOLD_V24) || defined(__NRFX_DOXYGEN__)
236+
NRF_REGULATORS_POF_THR_2V4 = REGULATORS_POFCON_THRESHOLD_V24, ///< Set threshold to 2.4 V.
237+
#endif
238+
#if defined(REGULATORS_POFCON_THRESHOLD_V25) || defined(__NRFX_DOXYGEN__)
239+
NRF_REGULATORS_POF_THR_2V5 = REGULATORS_POFCON_THRESHOLD_V25, ///< Set threshold to 2.5 V.
240+
#endif
241+
#if defined(REGULATORS_POFCON_THRESHOLD_V26) || defined(__NRFX_DOXYGEN__)
242+
NRF_REGULATORS_POF_THR_2V6 = REGULATORS_POFCON_THRESHOLD_V26, ///< Set threshold to 2.6 V.
243+
#endif
244+
#if defined(REGULATORS_POFCON_THRESHOLD_V27) || defined(__NRFX_DOXYGEN__)
245+
NRF_REGULATORS_POF_THR_2V7 = REGULATORS_POFCON_THRESHOLD_V27, ///< Set threshold to 2.7 V.
246+
#endif
247+
#if defined(REGULATORS_POFCON_THRESHOLD_V28) || defined(__NRFX_DOXYGEN__)
248+
NRF_REGULATORS_POF_THR_2V8 = REGULATORS_POFCON_THRESHOLD_V28, ///< Set threshold to 2.8 V.
249+
#endif
175250
} nrf_regulators_pof_thr_t;
176251
#endif
177252

@@ -346,6 +421,34 @@ NRF_STATIC_INLINE uint32_t nrf_regulators_elv_mode_allow_get(NRF_REGULATORS_Type
346421
NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const * p_reg);
347422
#endif
348423

424+
#if NRF_REGULATORS_HAS_HIBERNATOR
425+
/**
426+
* @brief Function for putting the CPU in hibernation mode.
427+
*
428+
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
429+
*/
430+
NRF_STATIC_INLINE void nrf_regulators_system_hibernate(NRF_REGULATORS_Type * p_reg);
431+
432+
/**
433+
* @brief Function for enabling or disabling the GPIO retention release on wake up
434+
* from hibernation mode.
435+
*
436+
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
437+
* @param[in] enable True if GPIO retention release is to be enabled, false otherwise.
438+
*/
439+
NRF_STATIC_INLINE void nrf_regulators_gpio_retention_release_set(NRF_REGULATORS_Type * p_reg,
440+
bool enable);
441+
/**
442+
* @brief Function for checking the GPIO retention status.
443+
*
444+
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
445+
*
446+
* @retval true GPIO retention is active.
447+
* @retval false GPIO retention is not active.
448+
*/
449+
NRF_STATIC_INLINE bool nrf_regulators_gpio_retention_check(NRF_REGULATORS_Type const * p_reg);
450+
#endif
451+
349452
#ifndef NRF_DECLARE_ONLY
350453

351454
#if NRF_REGULATORS_HAS_VREG_ANY
@@ -539,6 +642,31 @@ NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const *
539642
}
540643
#endif
541644

645+
#if NRF_REGULATORS_HAS_HIBERNATOR
646+
NRF_STATIC_INLINE void nrf_regulators_system_hibernate(NRF_REGULATORS_Type * p_reg)
647+
{
648+
p_reg->HIBERNATOR.SYSTEMHIBERNATE =
649+
REGULATORS_HIBERNATOR_SYSTEMHIBERNATE_SYSTEMHIBERNATE_Enter;
650+
}
651+
652+
NRF_STATIC_INLINE void nrf_regulators_gpio_retention_release_set(NRF_REGULATORS_Type * p_reg,
653+
bool enable)
654+
{
655+
p_reg->HIBERNATOR.GPIORETENTIONRELEASE = (enable
656+
? REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_Release
657+
: REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_NoRelease)
658+
<< REGULATORS_HIBERNATOR_GPIORETENTIONRELEASE_GPIORETENTIONRELEASE_Pos;
659+
}
660+
661+
NRF_STATIC_INLINE bool nrf_regulators_gpio_retention_check(NRF_REGULATORS_Type const * p_reg)
662+
{
663+
return (p_reg->HIBERNATOR.GPIORETENTIONSTATUS
664+
& REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Msk)
665+
>> REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Pos
666+
== REGULATORS_HIBERNATOR_GPIORETENTIONSTATUS_GPIORETENTIONSTATUS_Active;
667+
}
668+
#endif
669+
542670
#endif // NRF_DECLARE_ONLY
543671

544672
/** @} */

‎nrfx/hal/nrf_saadc.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -448,6 +448,7 @@ typedef enum
448448
NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW.
449449
NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH.
450450
NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW.
451+
#if (SAADC_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
451452
NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH.
452453
NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW.
453454
NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH.
@@ -456,6 +457,7 @@ typedef enum
456457
NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW.
457458
NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH.
458459
NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
460+
#endif
459461
} nrf_saadc_event_t;
460462

461463
/** @brief Analog-to-digital converter interrupt masks. */
@@ -475,6 +477,7 @@ typedef enum
475477
NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event.
476478
NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event.
477479
NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event.
480+
#if (SAADC_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
478481
NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event.
479482
NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event.
480483
NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event.
@@ -483,6 +486,7 @@ typedef enum
483486
NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event.
484487
NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event.
485488
NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event.
489+
#endif
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NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
487491
} nrf_saadc_int_mask_t;
488492

‎nrfx/mdk/nrf.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ POSSIBILITY OF SUCH DAMAGE.
3838
/* MDK version */
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#define MDK_MAJOR_VERSION 8
4040
#define MDK_MINOR_VERSION 72
41-
#define MDK_MICRO_VERSION 2
41+
#define MDK_MICRO_VERSION 3
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4343

4444
/* Define coprocessor domains */

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