Fixes to be upstreamed - 1

1. add "addPostBBSections" API to NPM
2. remove LowerConstantIntrinsicsPass() from NPM as it was merged with PreISelLowering in llvm#97727
3. add missing passes in NPM pipeline (stackslotcoloring, MachineLateInstrsCleanupPass)
4. disable certain garbage collection passes for AMDGPU (GCLowering, PatachableFunctions)

Author: vikramRH

llvm/include/llvm/Passes/CodeGenPassBuilder.h

@@ -552,6 +552,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
   /// Add standard basic block placement passes.
   void addBlockPlacement(AddMachinePass &) const;
 
+  void addPostBBSections(AddMachinePass &) const {}
+
   using CreateMCStreamer =
       std::function<Expected<std::unique_ptr<MCStreamer>>(MCContext &)>;
   void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const {
@@ -808,7 +810,6 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addIRPasses(
   // TODO: add a pass insertion point here
   addPass(GCLoweringPass());
   addPass(ShadowStackGCLoweringPass());
-  addPass(LowerConstantIntrinsicsPass());
 
   // Make sure that no unreachable blocks are instruction selected.
   addPass(UnreachableBlockElimPass());
@@ -1114,6 +1115,8 @@ Error CodeGenPassBuilder<Derived, TargetMachineT>::addMachinePasses(
       addPass(MachineOutlinerPass(Opt.EnableMachineOutliner));
   }
 
+  derived().addPostBBSections(addPass);
+
   addPass(StackFrameLayoutAnalysisPass());
 
   // Add passes that directly emit MI after all other MI passes.
@@ -1300,6 +1303,7 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addOptimizedRegAlloc(
     // addRegAssignmentOptimized did not add a reg alloc pass, so do nothing.
     return;
   }
+  addPass(StackSlotColoringPass());
   // Allow targets to expand pseudo instructions depending on the choice of
   // registers before MachineCopyPropagation.
   derived().addPostRewrite(addPass);
@@ -1322,6 +1326,7 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addOptimizedRegAlloc(
 template <typename Derived, typename TargetMachineT>
 void CodeGenPassBuilder<Derived, TargetMachineT>::addMachineLateOptimization(
     AddMachinePass &addPass) const {
+  addPass(MachineLateInstrsCleanupPass());
   // Branch folding must be run after regalloc and prolog/epilog insertion.
   addPass(BranchFolderPass(Opt.EnableTailMerge));
 
@@ -1332,9 +1337,6 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addMachineLateOptimization(
   if (!TM.requiresStructuredCFG())
     addPass(TailDuplicatePass());
 
-  // Cleanup of redundant (identical) address/immediate loads.
-  addPass(MachineLateInstrsCleanupPass());
-
   // Copy propagation.
   addPass(MachineCopyPropagationPass());
 }

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -74,6 +74,7 @@
 #include "llvm/CodeGen/AtomicExpand.h"
 #include "llvm/CodeGen/BranchRelaxation.h"
 #include "llvm/CodeGen/DeadMachineInstructionElim.h"
+#include "llvm/CodeGen/GCMetadata.h"
 #include "llvm/CodeGen/GlobalISel/CSEInfo.h"
 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
@@ -157,6 +158,7 @@ class AMDGPUCodeGenPassBuilder
   void addPreRegAlloc(AddMachinePass &) const;
   void addOptimizedRegAlloc(AddMachinePass &) const;
   void addPreSched2(AddMachinePass &) const;
+  void addPostBBSections(AddMachinePass &) const;
 
   /// Check if a pass is enabled given \p Opt option. The option always
   /// overrides defaults if explicitly used. Otherwise its default will be used
@@ -2059,8 +2061,8 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
   // Exceptions and StackMaps are not supported, so these passes will never do
   // anything.
   // Garbage collection is not supported.
-  disablePass<StackMapLivenessPass, FuncletLayoutPass,
-              ShadowStackGCLoweringPass>();
+  disablePass<StackMapLivenessPass, FuncletLayoutPass, PatchableFunctionPass,
+              ShadowStackGCLoweringPass, GCLoweringPass>();
 }
 
 void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass &addPass) const {
@@ -2347,6 +2349,13 @@ void AMDGPUCodeGenPassBuilder::addPreSched2(AddMachinePass &addPass) const {
   addPass(SIPostRABundlerPass());
 }
 
+void AMDGPUCodeGenPassBuilder::addPostBBSections(
+    AddMachinePass &addPass) const {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
+  addPass(AMDGPUPreloadKernArgPrologPass());
+}
+
 void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const {
   if (isPassEnabled(EnableVOPD, CodeGenOptLevel::Less)) {
     addPass(GCNCreateVOPDPass());