[vpr][src] remove use cases of ipin_rr_switch

amin1377 · amin1377 · commit fa2d648feddb · 2025-11-22T09:10:50.000-08:00
diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp
@@ -69,7 +69,6 @@ void routing_stats(const Netlist<>& net_list,
                    float R_minW_pmos,
                    float grid_logic_tile_area,
                    e_directionality directionality,
-                   RRSwitchId wire_to_ipin_switch,
                    bool is_flat) {
     const DeviceContext& device_ctx = g_vpr_ctx.device();
     auto& rr_graph = device_ctx.rr_graph;
@@ -116,8 +115,12 @@ void routing_stats(const Netlist<>& net_list,
     VTR_LOG("\tTotal used logic block area: %g\n", used_area);
 
     if (route_type == e_route_type::DETAILED) {
-        count_routing_transistors(directionality, num_rr_switch, wire_to_ipin_switch,
-                                  segment_inf, R_minW_nmos, R_minW_pmos, is_flat);
+        count_routing_transistors(directionality,
+                                  num_rr_switch,
+                                  segment_inf,
+                                  R_minW_nmos,
+                                  R_minW_pmos,
+                                  is_flat);
         get_segment_usage_stats(segment_inf);
     }
 
diff --git a/vpr/src/base/stats.h b/vpr/src/base/stats.h
@@ -21,7 +21,6 @@ void routing_stats(const Netlist<>& net_list,
                    float R_minW_pmos,
                    float grid_logic_tile_area,
                    e_directionality directionality,
-                   RRSwitchId wire_to_ipin_switch,
                    bool is_flat);
 
 void print_wirelen_prob_dist(bool is_flat);
diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp
@@ -1500,7 +1500,6 @@ void vpr_analysis(const Netlist<>& net_list,
                   vpr_setup.RoutingArch.R_minW_pmos,
                   Arch.grid_logic_tile_area,
                   vpr_setup.RoutingArch.directionality,
-                  vpr_setup.RoutingArch.wire_to_rr_ipin_switch,
                   is_flat);
 
     if (vpr_setup.TimingEnabled) {
diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h
@@ -1493,14 +1493,6 @@ struct t_det_routing_arch {
     /// wires from another die to ipins in different die
     int wire_to_arch_ipin_switch_between_dice = -1;
 
-    /// keeps track of the type of RR graph switch
-    /// that connects wires to ipins in the RR graph
-    RRSwitchId wire_to_rr_ipin_switch;
-
-    /// keeps track of the type of RR graph switch that connects wires
-    /// from another die to ipins in different die in the RR graph
-    int wire_to_rr_ipin_switch_between_dice = -1;
-
     /// Resistance (in Ohms) of a minimum width nmos transistor.
     /// Used only in the FPGA area model.
     float R_minW_nmos;
diff --git a/vpr/src/route/rr_graph_generation/rr_graph.cpp b/vpr/src/route/rr_graph_generation/rr_graph.cpp
@@ -366,7 +366,6 @@ static void build_rr_graph(e_graph_type graph_type,
                            const std::vector<t_direct_inf>& directs,
                            const std::vector<t_scatter_gather_pattern>& scatter_gather_patterns,
                            const std::vector<t_layer_def>& interposer_inf,
-                           RRSwitchId& wire_to_rr_ipin_switch,
                            bool is_flat,
                            int* Warnings,
                            const int route_verbosity);
@@ -455,8 +454,6 @@ void create_rr_graph(e_graph_type graph_type,
                              device_ctx.arch,
                              &mutable_device_ctx.chan_width,
                              router_opts.base_cost_type,
-                             &det_routing_arch.wire_to_rr_ipin_switch,
-                             &det_routing_arch.wire_to_arch_ipin_switch_between_dice,
                              det_routing_arch.read_rr_graph_filename.c_str(),
                              &mutable_device_ctx.loaded_rr_graph_filename,
                              router_opts.read_rr_edge_metadata,
@@ -492,7 +489,6 @@ void create_rr_graph(e_graph_type graph_type,
                                directs,
                                device_ctx.arch->scatter_gather_patterns,
                                device_ctx.arch->grid_layout().layers,
-                               det_routing_arch.wire_to_rr_ipin_switch,
                                is_flat,
                                Warnings,
                                router_opts.route_verbosity);
@@ -512,7 +508,6 @@ void create_rr_graph(e_graph_type graph_type,
                                                det_routing_arch.R_minW_pmos,
                                                router_opts.base_cost_type,
                                                directs,
-                                               det_routing_arch.wire_to_rr_ipin_switch,
                                                det_routing_arch.shrink_boundary,  // Shrink to the smallest boundary, no routing wires for empty zone
                                                det_routing_arch.perimeter_cb,     // Now I/O or any programmable blocks on perimeter can have full cb access (both cbx and cby)
                                                det_routing_arch.through_channel,  // Allow/Prohibit through tracks across multi-height and multi-width grids
@@ -693,7 +688,6 @@ static void build_rr_graph(e_graph_type graph_type,
                            const std::vector<t_direct_inf>& directs,
                            const std::vector<t_scatter_gather_pattern>& scatter_gather_patterns,
                            const std::vector<t_layer_def>& interposer_inf,
-                           RRSwitchId& wire_to_rr_ipin_switch,
                            bool is_flat,
                            int* Warnings,
                            const int route_verbosity) {
@@ -1115,9 +1109,7 @@ static void build_rr_graph(e_graph_type graph_type,
                                  g_vpr_ctx.mutable_device().switch_fanin_remap,
                                  device_ctx.all_sw_inf,
                                  R_minW_nmos,
-                                 R_minW_pmos,
-                                 wire_to_arch_ipin_switch,
-                                 wire_to_rr_ipin_switch);
+                                 R_minW_pmos);
 
     // Partition the rr graph edges for efficient access to configurable/non-configurable
     // edge subsets. Must be done after RR switches have been allocated
@@ -1126,7 +1118,7 @@ static void build_rr_graph(e_graph_type graph_type,
     // Save the channel widths for the newly constructed graph
     device_ctx.chan_width = nodes_per_chan;
 
-    rr_graph_externals(segment_inf, segment_inf_x, segment_inf_y, segment_inf_z, wire_to_rr_ipin_switch, base_cost_type);
+    rr_graph_externals(segment_inf, segment_inf_x, segment_inf_y, segment_inf_z, base_cost_type);
 
     const VibDeviceGrid vib_grid;
     check_rr_graph(device_ctx.rr_graph,
@@ -1236,22 +1228,18 @@ void build_tile_rr_graph(RRGraphBuilder& rr_graph_builder,
                                  delayless_switch);
 
     t_arch_switch_fanin switch_fanin_remap;
-    RRSwitchId dummy_sw_id;
     alloc_and_load_rr_switch_inf(rr_graph_builder,
                                  switch_fanin_remap,
                                  sw_map,
                                  det_routing_arch.R_minW_nmos,
-                                 det_routing_arch.R_minW_pmos,
-                                 det_routing_arch.wire_to_arch_ipin_switch,
-                                 dummy_sw_id);
+                                 det_routing_arch.R_minW_pmos);
     rr_graph_builder.partition_edges();
 }
 
 void rr_graph_externals(const std::vector<t_segment_inf>& segment_inf,
                         const std::vector<t_segment_inf>& segment_inf_x,
                         const std::vector<t_segment_inf>& segment_inf_y,
                         const std::vector<t_segment_inf>& segment_inf_z,
-                        RRSwitchId wire_to_rr_ipin_switch,
                         e_base_cost_type base_cost_type) {
     const DeviceContext& device_ctx = g_vpr_ctx.device();
     const RRGraphView& rr_graph = device_ctx.rr_graph;
@@ -1260,9 +1248,9 @@ void rr_graph_externals(const std::vector<t_segment_inf>& segment_inf,
     vtr::vector<RRIndexedDataId, t_rr_indexed_data>& rr_indexed_data = mutable_device_ctx.rr_indexed_data;
     bool echo_enabled = getEchoEnabled() && isEchoFileEnabled(E_ECHO_RR_GRAPH_INDEXED_DATA);
     const char* echo_file_name = getEchoFileName(E_ECHO_RR_GRAPH_INDEXED_DATA);
-    add_rr_graph_C_from_switches(rr_graph.rr_switch_inf(wire_to_rr_ipin_switch).Cin);
+    add_rr_graph_C_from_switches();
     alloc_and_load_rr_indexed_data(rr_graph, grid, segment_inf, segment_inf_x, segment_inf_y, segment_inf_z,
-                                   rr_indexed_data, wire_to_rr_ipin_switch, base_cost_type, echo_enabled, echo_file_name);
+                                   rr_indexed_data, base_cost_type, echo_enabled, echo_file_name);
     //load_rr_index_segments(segment_inf.size());
 }
 
diff --git a/vpr/src/route/rr_graph_generation/rr_graph.h b/vpr/src/route/rr_graph_generation/rr_graph.h
@@ -47,7 +47,6 @@ void rr_graph_externals(const std::vector<t_segment_inf>& segment_inf,
                         const std::vector<t_segment_inf>& segment_inf_x,
                         const std::vector<t_segment_inf>& segment_inf_y,
                         const std::vector<t_segment_inf>& segment_inf_z,
-                        RRSwitchId wire_to_rr_ipin_switch,
                         e_base_cost_type base_cost_type);
 
 std::vector<vtr::Matrix<int>> alloc_and_load_actual_fc(const std::vector<t_physical_tile_type>& types,
diff --git a/vpr/src/route/rr_graph_generation/rr_graph_area.cpp b/vpr/src/route/rr_graph_generation/rr_graph_area.cpp
@@ -205,11 +205,11 @@ static void count_bidir_routing_transistors(int num_switch, float R_minW_nmos, f
                             break;
 
                         case e_rr_type::IPIN:
-                            RRSwitchId switch_id = RRSwitchId(rr_graph.edge_switch(RRNodeId(from_node), iedge));
-                            if (ipin_switch_count.find(switch_id) == ipin_switch_count.end()) {
-                                ipin_switch_count[switch_id] = 0;
+                            iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge);
+                            if (ipin_switch_count.find(RRSwitchId(iswitch)) == ipin_switch_count.end()) {
+                                ipin_switch_count[RRSwitchId(iswitch)] = 0;
                             }
-                            ipin_switch_count[switch_id]++;
+                            ipin_switch_count[RRSwitchId(iswitch)]++;
                             num_inputs_to_cblock[to_node]++;
                             max_inputs_to_cblock = std::max(max_inputs_to_cblock, num_inputs_to_cblock[to_node]);
 
@@ -369,6 +369,7 @@ static void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segme
 
     ntrans = 0;
     std::unordered_map<RRSwitchId, size_t> ipin_switch_count;
+    RRSwitchId switch_id;
     for (const RRNodeId from_rr_node : device_ctx.rr_graph.nodes()) {
         size_t from_node = size_t(from_rr_node);
         from_rr_type = rr_graph.node_type(from_rr_node);
@@ -436,7 +437,7 @@ static void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segme
                             break;
 
                         case e_rr_type::IPIN:
-                            RRSwitchId switch_id = RRSwitchId(rr_graph.edge_switch(RRNodeId(from_node), iedge));
+                            switch_id = RRSwitchId(rr_graph.edge_switch(RRNodeId(from_node), iedge));
                             if (ipin_switch_count.find(switch_id) == ipin_switch_count.end()) {
                                 ipin_switch_count[switch_id] = 0;
                             }
diff --git a/vpr/src/route/rr_graph_generation/rr_graph_area.h b/vpr/src/route/rr_graph_generation/rr_graph_area.h
@@ -5,7 +5,6 @@
 
 void count_routing_transistors(enum e_directionality directionality,
                                int num_switch,
-                               RRSwitchId wire_to_ipin_switch,
                                std::vector<t_segment_inf>& segment_inf,
                                float R_minW_nmos,
                                float R_minW_pmos,
diff --git a/vpr/src/route/rr_graph_generation/tileable_rr_graph/tileable_rr_graph_builder.cpp b/vpr/src/route/rr_graph_generation/tileable_rr_graph/tileable_rr_graph_builder.cpp
@@ -82,7 +82,6 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
                                     const float R_minW_pmos,
                                     const e_base_cost_type& base_cost_type,
                                     const std::vector<t_direct_inf>& directs,
-                                    RRSwitchId& wire_to_rr_ipin_switch,
                                     const bool& shrink_boundary,
                                     const bool& perimeter_cb,
                                     const bool& through_channel,
@@ -276,7 +275,11 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
     // Allocate and load routing resource switches, which are derived from the switches from the architecture file,
     // based on their fanin in the rr graph. This routine also adjusts the rr nodes to point to these new rr switches
     device_ctx.rr_graph_builder.init_fan_in();
-    alloc_and_load_rr_switch_inf(device_ctx.rr_graph_builder, device_ctx.switch_fanin_remap, device_ctx.all_sw_inf, R_minW_nmos, R_minW_pmos, wire_to_arch_ipin_switch, wire_to_rr_ipin_switch);
+    alloc_and_load_rr_switch_inf(device_ctx.rr_graph_builder,
+                                 device_ctx.switch_fanin_remap,
+                                 device_ctx.all_sw_inf,
+                                 R_minW_nmos,
+                                 R_minW_pmos);
 
     // Save the channel widths for the newly constructed graph
     device_ctx.chan_width = chan_width;
@@ -291,7 +294,7 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
     // Allocate external data structures
     //  a. cost_index
     //  b. RC tree
-    rr_graph_externals(segment_inf, segment_inf_x, segment_inf_y, segment_inf_z, wire_to_rr_ipin_switch, base_cost_type);
+    rr_graph_externals(segment_inf, segment_inf_x, segment_inf_y, segment_inf_z, base_cost_type);
 
     // Sanitizer for the rr_graph, check connectivities of rr_nodes
     // Essential check for rr_graph, build look-up and
diff --git a/vpr/src/route/rr_graph_generation/tileable_rr_graph/tileable_rr_graph_builder.h b/vpr/src/route/rr_graph_generation/tileable_rr_graph/tileable_rr_graph_builder.h
@@ -27,7 +27,6 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
                                     const float R_minW_pmos,
                                     const e_base_cost_type& base_cost_type,
                                     const std::vector<t_direct_inf>& directs,
-                                    RRSwitchId& wire_to_rr_ipin_switch,
                                     const bool& shrink_boundary,
                                     const bool& perimeter_cb,
                                     const bool& through_channel,
