Add debug mode using mini-gdbstub submodules

Author: RinHizakura

.gitmodules

@@ -1,3 +1,6 @@
 [submodule "riscv-arch-test"]
 	path = tests/riscv-arch-test
 	url = https://github.com/riscv-non-isa/riscv-arch-test
+[submodule "mini-gdbstub"]
+	path = mini-gdbstub
+	url = https://github.com/RinHizakura/mini-gdbstub.git

Makefile

@@ -55,6 +55,22 @@ $(OUT)/emulate.o: CFLAGS += -fno-gcse -fno-crossjumping
 endif
 endif
 
+GDBSTUB :=
+ENABLE_GDBRSP ?= 1
+ifeq ("$(ENABLE_GDBRSP)", "1")
+CFLAGS += -D ENABLE_GDBRSP
+LDFLAGS += -Wl,-rpath="$(CURDIR)/mini-gdbstub" -L./mini-gdbstub -lgdbstub
+GDBSTUB += ./mini-gdbstub/libgdbstub.so
+$(GDBSTUB):
+	git submodule update --init mini-gdbstub
+	$(MAKE) -C mini-gdbstub
+$(OUT)/emulate.o: $(GDBSTUB)
+endif
+
+# Clear the .DEFAULT_GOAL special variable, so that the following turns
+# to the first target after .DEFAULT_GOAL is not set.
+.DEFAULT_GOAL :=
+
 all: $(BIN)
 
 OBJS := \

emulate.c

@@ -1672,6 +1672,92 @@ static inline bool op_unimp(struct riscv_t *rv, uint32_t insn UNUSED)
     return false;
 }
 
+#ifdef ENABLE_GDBRSP
+size_t rv_read_reg(void *args, int regno)
+{
+    struct riscv_t *rv = (struct riscv_t *) args;
+
+    if (regno < 32) {
+        return rv_get_reg(rv, regno);
+    } else if (regno == 32) {
+        return rv_get_pc(rv);
+    }
+
+    return -1;
+}
+
+void rv_read_mem(void *args, size_t addr, size_t len, void *val)
+{
+    struct riscv_t *rv = (struct riscv_t *) args;
+
+    for (size_t i = 0; i < len; i++)
+        *((uint8_t *) val + i) = rv->io.mem_read_b(rv, addr + i);
+}
+
+gdb_action_t rv_cont(void *args)
+{
+    struct riscv_t *rv = (struct riscv_t *) args;
+    const uint32_t cycles_per_step = 1;
+    for (; !rv_has_halted(rv) &&
+           rv->PC != rv->bp_addr;) { /* run until the flag is done */
+        /* step instructions */
+        rv_step(rv, cycles_per_step);
+    }
+
+    return ACT_RESUME;
+}
+
+bool rv_set_bp(void *args, size_t addr, bp_type_t type)
+{
+    struct riscv_t *rv = (struct riscv_t *) args;
+    if (type != BP_SOFTWARE || rv->bp_is_set)
+        return false;
+
+    rv->bp_is_set = true;
+    rv->bp_addr = addr;
+    return true;
+}
+
+bool rv_rm_bp(void *args, size_t addr, bp_type_t type)
+{
+    struct riscv_t *rv = (struct riscv_t *) args;
+    // It's fine when there's no matching breakpoint, just doing nothing
+    if (type != BP_SOFTWARE || !rv->bp_is_set || rv->bp_addr != addr)
+        return true;
+
+    rv->bp_is_set = false;
+    rv->bp_addr = 0;
+    return true;
+}
+
+struct target_ops rv_ops = {
+    .read_reg = rv_read_reg,
+    .read_mem = rv_read_mem,
+    .cont = rv_cont,
+    .stepi = NULL,
+    .set_bp = rv_set_bp,
+    .rm_bp = rv_rm_bp,
+};
+
+void rv_debug(struct riscv_t *rv)
+{
+    if (!gdbstub_init(&rv->gdbstub, &rv_ops,
+                      (arch_info_t){
+                          .reg_num = 33,
+                          .reg_byte = 4,
+                          .target_desc = TARGET_RV32,
+                      },
+                      "127.0.0.1:1234")) {
+        return;
+    }
+
+    if (!gdbstub_run(&rv->gdbstub, (void *) rv)) {
+        return;
+    }
+    gdbstub_close(&rv->gdbstub);
+}
+#endif /* ENABLE_GDBRSP */
+
 void rv_step(struct riscv_t *rv, int32_t cycles)
 {
     assert(rv);

main.c

@@ -7,6 +7,10 @@
 
 /* enable program trace mode */
 static bool opt_trace = false;
+#ifdef ENABLE_GDBRSP
+/* enable program debug mode */
+static bool opt_debug = false;
+#endif
 
 /* RISCV arch-test */
 static bool opt_arch_test = false;
@@ -60,6 +64,13 @@ static void run_and_trace(struct riscv_t *rv, elf_t *elf)
     }
 }
 
+#ifdef ENABLE_GDBRSP
+static void run_debug(struct riscv_t *rv)
+{
+    rv_debug(rv);
+}
+#endif
+
 static void run(struct riscv_t *rv)
 {
     const uint32_t cycles_per_step = 100;
@@ -94,6 +105,12 @@ static bool parse_args(int argc, char **args)
                 opt_trace = true;
                 continue;
             }
+#ifdef ENABLE_GDBRSP
+            if (!strcmp(arg, "--debug")) {
+                opt_debug = true;
+                continue;
+            }
+#endif
             if (!strcmp(arg, "--arch-test")) {
                 opt_arch_test = true;
                 if (i + 1 >= argc) {
@@ -199,7 +216,13 @@ int main(int argc, char **args)
     /* run based on the specified mode */
     if (opt_trace) {
         run_and_trace(rv, elf);
-    } else {
+    }
+#ifdef ENABLE_GDBRSP
+    else if (opt_debug) {
+        run_debug(rv);
+    }
+#endif
+    else {
         run(rv);
     }
 

mini-gdbstub

@@ -99,6 +99,11 @@ void rv_delete(struct riscv_t *);
 /* reset the RISC-V processor */
 void rv_reset(struct riscv_t *, riscv_word_t pc);
 
+#ifdef ENABLE_GDBRSP
+/* Run the RISCV-emulator in debug mode */
+void rv_debug(struct riscv_t *rv);
+#endif
+
 /* step the RISC-V emulator */
 void rv_step(struct riscv_t *, int32_t cycles);
 

riscv.h

@@ -1,6 +1,9 @@
 #pragma once
 #include <stdbool.h>
 
+#ifdef ENABLE_GDBRSP
+#include "mini-gdbstub/include/gdbstub.h"
+#endif
 #include "riscv.h"
 
 #define RV_NUM_REGS 32
@@ -138,6 +141,15 @@ struct riscv_t {
     /* user provided data */
     riscv_user_t userdata;
 
+#ifdef ENABLE_GDBRSP
+    /* gdbstub instance */
+    gdbstub_t gdbstub;
+
+    /* GDB instruction breakpoint */
+    bool bp_is_set;
+    size_t bp_addr;
+#endif
+
 #ifdef ENABLE_RV32F
     /* float registers */
     union {