[SR-13263] Invalid Debug Information Generation

[compnerd]

Previous ID	SR-13263
Radar	None
Original Reporter	@compnerd
Type	Bug

Attachment: Download

Additional Detail from JIRA

Votes	3
Component/s
Labels	Bug
Assignee	@adrian-prantl
Priority	Medium

md5: 1cf1abd3137f286141ea88df6a315030

Issue Description:

lit test reproducer:

// RUN: %empty-directory(%t)
// RUN: %target-swiftc_driver -DM -emit-module -emit-module-path %t/M.swiftmodule %s -module-name M
// RUN: not --crash %target-swiftc_driver -O -g -I %t -c %s -o /dev/null

#if M
import _Differentiation

public struct S<T> {
  class C {}
  let c: C
  internal var b: Bool
}

extension S: AdditiveArithmetic {
  public static var zero: S { fatalError() }

  public static func == (_ lhs: S, _ rhs: S) -> Bool { fatalError() }
  public static func + (_ lhs: S, _ rhs: S) -> S { fatalError() }
  public static func - (_ lhs: S, _ rhs: S) -> S { fatalError() }
}

extension S: Differentiable {
  public typealias TangentVector = S
}

#else
import _Differentiation
import M

struct T: Differentiable {
  var u1: U
  var u2: U
}

struct U: Differentiable {
  var s: S<Float>
  var v: V
}

struct V: Differentiable {
  var s: S<Float>
}
#endif

Crash:

swift-frontend: swift-dev/llvm-project/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp:572: void llvm::DwarfExpression::addFragmentOffset(const llvm::DIExpression *): Assertion `FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"' failed.
Stack dump:
1.  Swift version 5.3-dev (LLVM 6d510c802af0d59, Swift 3e090b483352b3c)
2.  Running pass 'Function Pass Manager' on module '/dev/null'.
3.  Running pass 'X86 Assembly Printer' on function '@"$s4null1TV4move5alongyAC13TangentVectorV_tF"'

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[compnerd]

Building this with the toolchain from master (swift: e9c3157ef666a1ed8eb106e805b03ce35b8ec586, llvm: e966de21c9ff9edcb098d508e1c206b3f5098373) with experimental differentiable programming support (mostly because reducing it further without the synthesized methods is difficult), seems to generate invalid debug information in the swift frontend.

Doing this in multiple phases (.swift -> .sil -> .o) seems to trigger the Debug Info validation:

conflicting debug info for argument 
 call void @llvm.dbg.value(metadata %T1M1SV1CCySf_G* %0, metadata !289, metadata !DIExpression(DW_OP_LLVM_fragment
, 0, 64)), !dbg !288 
!286 = !DILocalVariable(name: "self", arg: 1, scope: !283, file: !1, type: !287, flags: DIFlagArtificial) 
!289 = !DILocalVariable(name: "self", arg: 1, scope: !283, file: !1, type: !290, flags: DIFlagArtificial)

Doing it in a single phase triggers an LLVM assertion about the overlapping debug info fragment generated from this:

swift-frontend: /SourceCache/llvm-project/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp:572: void llvm::DwarfExpr
ession::addFragmentOffset(const llvm::DIExpression *): Assertion `FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"' failed.

It seems that -sil-verify-all doesn't actually catch the issue, which makes this a bit trickier to isolate.

+ @adrian-prantl @eeckstein @dan-zheng

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[swift-ci]

Comment by Mustafa YALCIN (JIRA)

3

[eeckstein]

@compnerd I could not reproduce the issue. Can you add a more self contained test case, e.g. with full expanded invocation lines? Also I had to fix some obvious syntax errors in the test file.

Also, how did you build the swift compiler? Is this reproducible on Mac?

[dan-zheng]

@eeckstein: the issue should be directly reproducible from the test case (which is a lit test) on both macOS and Linux.

---

I pushed the test case to dan-zheng@SR-13263 so it's easier to reproduce.

The crash is an LLVM assertion about overlapping debug info fragments:

swift-frontend: /SourceCache/llvm-project/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp:572: void llvm::DwarfExpr
ession::addFragmentOffset(const llvm::DIExpression *): Assertion `FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"' failed.

test/DebugInfo/sr13263.swift has a bunch of details. The issue is only reproducible with a two file test case and swiftc -O -g. The issue not reproducible if any of the following are true:

1. If Swift optimizations are disabled (-Onone).

2. If debug info is disabled (no -g).

3. If LoadableByAddress is disabled.

4. If code synthesized by `Differentiable` derived conformances are written out by hand.

5. If reproducer is compiled as one file instead of two files.

---

Could someone please help take a look? @compnerd and I are reaching the limits of our debugging ability, so any help would be greatly appreciated!

@eeckstein @adrian-prantl

[dan-zheng]

One thing that looks suspicious is multiple calls to @llvm.dbg.declare with the exact metadata arguments (file):

;; LLVM IR for the problematic function in SR-13263.

define hidden swiftcc void @"$s4main1TV4move5alongyAC13TangentVectorV_tF"(%T4main1TV13TangentVectorV* noalias nocapture dereferenceable(57) %0, %T4main1TV* nocapture swiftself dereferenceable(57) %1) #​0 !dbg !583 {
entry:
 %2 = alloca %T4main1VV13TangentVectorV, align 8
 call void @llvm.dbg.declare(metadata %T4main1VV13TangentVectorV* %2, metadata !586, metadata !DIExpression()), !dbg !590
 %3 = alloca %T4main1UV13TangentVectorV, align 8
 call void @llvm.dbg.declare(metadata %T4main1UV13TangentVectorV* %3, metadata !598, metadata !DIExpression()), !dbg !599
 %4 = alloca %T4main1VV13TangentVectorV, align 8
 call void @llvm.dbg.declare(metadata %T4main1VV13TangentVectorV* %4, metadata !586, metadata !DIExpression()), !dbg !600
 %5 = alloca %T4main1UV13TangentVectorV, align 8
 call void @llvm.dbg.declare(metadata %T4main1UV13TangentVectorV* %5, metadata !598, metadata !DIExpression()), !dbg !599

This is lowered from the following SIL post-LoadableByAddress (file):

 *** SIL module after #​99, stage IRGen Preparation, pass 1: LoadableByAddress (loadable-address)
// T.move(along:)
sil hidden @$s4main1TV4move5alongyAC13TangentVectorV_tF : $@convention(method) (@in_guaranteed T.TangentVector, @inout T) -> () {
// %0 "direction" // users: %6, %8, %41
// %1 "self" // users: %10, %43, %7
bb0(%0 : $*T.TangentVector, %1 : $*T):
 %2 = alloc_stack $V.TangentVector // users: %38, %28, %30, %26, %76
 %3 = alloc_stack $U.TangentVector // users: %11, %13, %25, %9, %75
 %4 = alloc_stack $V.TangentVector // users: %69, %59, %61, %57, %74
 %5 = alloc_stack $U.TangentVector // users: %44, %46, %56, %42, %73
 debug_value_addr %0 : $*T.TangentVector, let, name "direction", argno 1 // id: %6
 debug_value_addr %1 : $*T, var, name "self", argno 2 // id: %7

%8 = struct_element_addr %0 : $*T.TangentVector, #T.TangentVector.u1 // user: %9
 copy_addr [take] %8 to [initialization] %3 : $*U.TangentVector // id: %9
 %10 = struct_element_addr %1 : $*T, #T.u1 // users: %27, %15, %12
 debug_value_addr %3 : $*U.TangentVector, let, name "direction", argno 1 // id: %11
 debug_value_addr %10 : $*U, var, name "self", argno 2 // id: %12

...
 %25 = struct_element_addr %3 : $*U.TangentVector, #U.TangentVector.v // user: %26
 copy_addr [take] %25 to [initialization] %2 : $*V.TangentVector // id: %26
 %27 = struct_element_addr %10 : $*U, #U.v // users: %40, %32, %29
 debug_value_addr %2 : $*V.TangentVector, let, name "direction", argno 1 // id: %28
 debug_value_addr %27 : $*V, var, name "self", argno 2 // id: %29

...
 %41 = struct_element_addr %0 : $*T.TangentVector, #T.TangentVector.u2 // user: %42
 copy_addr [take] %41 to [initialization] %5 : $*U.TangentVector // id: %42
 %43 = struct_element_addr %1 : $*T, #T.u2 // users: %58, %48, %45
 debug_value_addr %5 : $*U.TangentVector, let, name "direction", argno 1 // id: %44
 debug_value_addr %43 : $*U, var, name "self", argno 2 // id: %45

...
 %56 = struct_element_addr %5 : $*U.TangentVector, #U.TangentVector.v // user: %57
 copy_addr [take] %56 to [initialization] %4 : $*V.TangentVector // id: %57
 %58 = struct_element_addr %43 : $*U, #U.v // users: %71, %63, %60
 debug_value_addr %4 : $*V.TangentVector, let, name "direction", argno 1 // id: %59
 debug_value_addr %58 : $*V, var, name "self", argno 2 // id: %60

...
} // end sil function '$s4main1TV4move5alongyAC13TangentVectorV_tF'

Is it legal to have multiple debug_value_addr of different SIL addresses (aggregates and their projections) with the same type/name/argno? It seems like this may be a conflict, resulting in the LLVM "overlapping fragments" assertion failure.

[eeckstein]

@adrian-prantl any thoughts?

[compnerd]

@dan-zheng I think that the reason might be that _Differentiation is not enabled by default. Some how it was enabled when I built - which might have been an artifact of a partial clean build on my build.

@eeckstein it just needs build-script --extra-cmake-options="-DSWIFT_ENABLE_EXPERIMENTAL_DIFFERENTIABLE_PROGRAMMING=YES". Sorry about that, I thought was default due to my build.