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git apple-llvm automerger
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Merge commit '27e01d1d74bf' from llvm.org/main into next
2 parents 77a4b03 + 27e01d1 commit 97aa9dd

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-7
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2 files changed

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-7
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llvm/lib/Target/X86/X86FrameLowering.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3063,10 +3063,7 @@ bool X86FrameLowering::spillCalleeSavedRegisters(
30633063
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
30643064

30653065
TII.storeRegToStackSlot(MBB, MI, Reg, true, I.getFrameIdx(), RC, TRI,
3066-
Register());
3067-
--MI;
3068-
MI->setFlag(MachineInstr::FrameSetup);
3069-
++MI;
3066+
Register(), MachineInstr::FrameSetup);
30703067
}
30713068

30723069
return true;

llvm/lib/Target/X86/X86InstrInfo.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4801,7 +4801,8 @@ void X86InstrInfo::storeRegToStackSlot(
48014801
loadStoreTileReg(MBB, MI, Opc, SrcReg, FrameIdx, isKill);
48024802
else
48034803
addFrameReference(BuildMI(MBB, MI, DebugLoc(), get(Opc)), FrameIdx)
4804-
.addReg(SrcReg, getKillRegState(isKill));
4804+
.addReg(SrcReg, getKillRegState(isKill))
4805+
.setMIFlag(Flags);
48054806
}
48064807

48074808
void X86InstrInfo::loadRegFromStackSlot(
@@ -4821,8 +4822,8 @@ void X86InstrInfo::loadRegFromStackSlot(
48214822
if (isAMXOpcode(Opc))
48224823
loadStoreTileReg(MBB, MI, Opc, DestReg, FrameIdx);
48234824
else
4824-
addFrameReference(BuildMI(MBB, MI, DebugLoc(), get(Opc), DestReg),
4825-
FrameIdx);
4825+
addFrameReference(BuildMI(MBB, MI, DebugLoc(), get(Opc), DestReg), FrameIdx)
4826+
.setMIFlag(Flags);
48264827
}
48274828

48284829
bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,

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