[AArch64InstPrinter] Change printAddSubImm to comment imm value when shifted

Add a comment when there is a shifted value,
    add x9, x0, #291, lsl #12 ; =1191936
but not when the immediate value is unshifted,
    subs x9, x0, #256 ; =256
when the comment adds nothing additional to the reader.

Differential Revision: https://reviews.llvm.org/D107196

(cherry picked from commit 0d8cd4e)

Author: jasonmolenda

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

@@ -1026,11 +1026,11 @@ void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum,
     unsigned Shift =
         AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm());
     O << '#' << formatImm(Val);
-    if (Shift != 0)
+    if (Shift != 0) {
       printShifter(MI, OpNum + 1, STI, O);
-
-    if (CommentStream)
-      *CommentStream << '=' << formatImm(Val << Shift) << '\n';
+      if (CommentStream)
+        *CommentStream << '=' << formatImm(Val << Shift) << '\n';
+    }
   } else {
     assert(MO.isExpr() && "Unexpected operand type!");
     MO.getExpr()->print(O, &MAI);

llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll

@@ -65,7 +65,7 @@ define void @val_compare_and_swap(i128* %p, i128 %oldval, i128 %newval) {
 ;
 ; CHECK-CAS-O0-LABEL: val_compare_and_swap:
 ; CHECK-CAS-O0:       // %bb.0:
-; CHECK-CAS-O0-NEXT:    sub sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    sub sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-CAS-O0-NEXT:    str x3, [sp, #8] // 8-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    mov x1, x5
@@ -81,7 +81,7 @@ define void @val_compare_and_swap(i128* %p, i128 %oldval, i128 %newval) {
 ; CHECK-CAS-O0-NEXT:    mov v0.d[0], x9
 ; CHECK-CAS-O0-NEXT:    mov v0.d[1], x8
 ; CHECK-CAS-O0-NEXT:    str q0, [x0]
-; CHECK-CAS-O0-NEXT:    add sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    add sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    ret
 
 %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval acquire acquire
@@ -150,7 +150,7 @@ define void @val_compare_and_swap_monotonic_seqcst(i128* %p, i128 %oldval, i128
 ;
 ; CHECK-CAS-O0-LABEL: val_compare_and_swap_monotonic_seqcst:
 ; CHECK-CAS-O0:       // %bb.0:
-; CHECK-CAS-O0-NEXT:    sub sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    sub sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-CAS-O0-NEXT:    str x3, [sp, #8] // 8-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    mov x1, x5
@@ -166,7 +166,7 @@ define void @val_compare_and_swap_monotonic_seqcst(i128* %p, i128 %oldval, i128
 ; CHECK-CAS-O0-NEXT:    mov v0.d[0], x9
 ; CHECK-CAS-O0-NEXT:    mov v0.d[1], x8
 ; CHECK-CAS-O0-NEXT:    str q0, [x0]
-; CHECK-CAS-O0-NEXT:    add sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    add sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    ret
 
   %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval monotonic seq_cst
@@ -235,7 +235,7 @@ define void @val_compare_and_swap_release_acquire(i128* %p, i128 %oldval, i128 %
 ;
 ; CHECK-CAS-O0-LABEL: val_compare_and_swap_release_acquire:
 ; CHECK-CAS-O0:       // %bb.0:
-; CHECK-CAS-O0-NEXT:    sub sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    sub sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-CAS-O0-NEXT:    str x3, [sp, #8] // 8-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    mov x1, x5
@@ -251,7 +251,7 @@ define void @val_compare_and_swap_release_acquire(i128* %p, i128 %oldval, i128 %
 ; CHECK-CAS-O0-NEXT:    mov v0.d[0], x9
 ; CHECK-CAS-O0-NEXT:    mov v0.d[1], x8
 ; CHECK-CAS-O0-NEXT:    str q0, [x0]
-; CHECK-CAS-O0-NEXT:    add sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    add sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    ret
 
   %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval release acquire
@@ -320,7 +320,7 @@ define void @val_compare_and_swap_monotonic(i128* %p, i128 %oldval, i128 %newval
 ;
 ; CHECK-CAS-O0-LABEL: val_compare_and_swap_monotonic:
 ; CHECK-CAS-O0:       // %bb.0:
-; CHECK-CAS-O0-NEXT:    sub sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    sub sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-CAS-O0-NEXT:    str x3, [sp, #8] // 8-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    mov x1, x5
@@ -336,7 +336,7 @@ define void @val_compare_and_swap_monotonic(i128* %p, i128 %oldval, i128 %newval
 ; CHECK-CAS-O0-NEXT:    mov v0.d[0], x9
 ; CHECK-CAS-O0-NEXT:    mov v0.d[1], x8
 ; CHECK-CAS-O0-NEXT:    str q0, [x0]
-; CHECK-CAS-O0-NEXT:    add sp, sp, #16 // =16
+; CHECK-CAS-O0-NEXT:    add sp, sp, #16
 ; CHECK-CAS-O0-NEXT:    ret
   %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval release acquire
   %val = extractvalue { i128, i1 } %pair, 0
@@ -348,7 +348,7 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-LLSC-O1-LABEL: atomic_load_relaxed:
 ; CHECK-LLSC-O1:       // %bb.0:
 ; CHECK-LLSC-O1-NEXT:    mov w8, #64
-; CHECK-LLSC-O1-NEXT:    sub x9, x8, #64 // =64
+; CHECK-LLSC-O1-NEXT:    sub x9, x8, #64
 ; CHECK-LLSC-O1-NEXT:  .LBB4_1: // %atomicrmw.start
 ; CHECK-LLSC-O1-NEXT:    // =>This Inner Loop Header: Depth=1
 ; CHECK-LLSC-O1-NEXT:    ldxp x10, x8, [x2]
@@ -365,7 +365,7 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-CAS-O1-LABEL: atomic_load_relaxed:
 ; CHECK-CAS-O1:       // %bb.0:
 ; CHECK-CAS-O1-NEXT:    mov w8, #64
-; CHECK-CAS-O1-NEXT:    sub x9, x8, #64 // =64
+; CHECK-CAS-O1-NEXT:    sub x9, x8, #64
 ; CHECK-CAS-O1-NEXT:  .LBB4_1: // %atomicrmw.start
 ; CHECK-CAS-O1-NEXT:    // =>This Inner Loop Header: Depth=1
 ; CHECK-CAS-O1-NEXT:    ldxp x10, x8, [x2]
@@ -381,7 +381,7 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ;
 ; CHECK-LLSC-O0-LABEL: atomic_load_relaxed:
 ; CHECK-LLSC-O0:       // %bb.0:
-; CHECK-LLSC-O0-NEXT:    sub sp, sp, #64 // =64
+; CHECK-LLSC-O0-NEXT:    sub sp, sp, #64
 ; CHECK-LLSC-O0-NEXT:    .cfi_def_cfa_offset 64
 ; CHECK-LLSC-O0-NEXT:    str x2, [sp, #48] // 8-byte Folded Spill
 ; CHECK-LLSC-O0-NEXT:    str x3, [sp, #56] // 8-byte Folded Spill
@@ -395,17 +395,17 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-LLSC-O0-NEXT:    mov w10, #64
 ; CHECK-LLSC-O0-NEXT:    // kill: def $x10 killed $w10
 ; CHECK-LLSC-O0-NEXT:    str x10, [sp, #8] // 8-byte Folded Spill
-; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64 // =64
-; CHECK-LLSC-O0-NEXT:    subs x13, x8, #64 // =64
+; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64
+; CHECK-LLSC-O0-NEXT:    subs x13, x8, #64
 ; CHECK-LLSC-O0-NEXT:    lsl x14, x15, x10
 ; CHECK-LLSC-O0-NEXT:    lsr x13, x15, x13
 ; CHECK-LLSC-O0-NEXT:    orr x13, x13, x12
 ; CHECK-LLSC-O0-NEXT:    lsl x15, x15, x16
-; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64 // =64
+; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64
 ; CHECK-LLSC-O0-NEXT:    csel x14, x14, x12, lo
-; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64 // =64
+; CHECK-LLSC-O0-NEXT:    subs x16, x10, #64
 ; CHECK-LLSC-O0-NEXT:    csel x13, x13, x15, lo
-; CHECK-LLSC-O0-NEXT:    subs x15, x10, #0 // =0
+; CHECK-LLSC-O0-NEXT:    subs x15, x10, #0
 ; CHECK-LLSC-O0-NEXT:    csel x13, x12, x13, eq
 ; CHECK-LLSC-O0-NEXT:    orr x9, x9, x14
 ; CHECK-LLSC-O0-NEXT:    orr x12, x12, x13
@@ -414,27 +414,27 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-LLSC-O0-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
 ; CHECK-LLSC-O0-NEXT:    mov v0.d[1], x12
 ; CHECK-LLSC-O0-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
-; CHECK-LLSC-O0-NEXT:    subs x13, x10, #64 // =64
-; CHECK-LLSC-O0-NEXT:    subs x8, x8, #64 // =64
+; CHECK-LLSC-O0-NEXT:    subs x13, x10, #64
+; CHECK-LLSC-O0-NEXT:    subs x8, x8, #64
 ; CHECK-LLSC-O0-NEXT:    lsl x8, x12, x8
 ; CHECK-LLSC-O0-NEXT:    orr x8, x8, x9, lsr #0
 ; CHECK-LLSC-O0-NEXT:    lsr x12, x12, x13
-; CHECK-LLSC-O0-NEXT:    subs x13, x10, #64 // =64
+; CHECK-LLSC-O0-NEXT:    subs x13, x10, #64
 ; CHECK-LLSC-O0-NEXT:    csel x8, x8, x12, lo
-; CHECK-LLSC-O0-NEXT:    subs x10, x10, #0 // =0
+; CHECK-LLSC-O0-NEXT:    subs x10, x10, #0
 ; CHECK-LLSC-O0-NEXT:    csel x10, x9, x8, eq
 ; CHECK-LLSC-O0-NEXT:    stxp w8, x9, x10, [x11]
 ; CHECK-LLSC-O0-NEXT:    cbnz w8, .LBB4_1
 ; CHECK-LLSC-O0-NEXT:  // %bb.2: // %atomicrmw.end
 ; CHECK-LLSC-O0-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-LLSC-O0-NEXT:    ldr x8, [sp, #56] // 8-byte Folded Reload
 ; CHECK-LLSC-O0-NEXT:    str q0, [x8]
-; CHECK-LLSC-O0-NEXT:    add sp, sp, #64 // =64
+; CHECK-LLSC-O0-NEXT:    add sp, sp, #64
 ; CHECK-LLSC-O0-NEXT:    ret
 ;
 ; CHECK-CAS-O0-LABEL: atomic_load_relaxed:
 ; CHECK-CAS-O0:       // %bb.0:
-; CHECK-CAS-O0-NEXT:    sub sp, sp, #64 // =64
+; CHECK-CAS-O0-NEXT:    sub sp, sp, #64
 ; CHECK-CAS-O0-NEXT:    .cfi_def_cfa_offset 64
 ; CHECK-CAS-O0-NEXT:    str x2, [sp, #48] // 8-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    str x3, [sp, #56] // 8-byte Folded Spill
@@ -448,17 +448,17 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-CAS-O0-NEXT:    mov w10, #64
 ; CHECK-CAS-O0-NEXT:    // kill: def $x10 killed $w10
 ; CHECK-CAS-O0-NEXT:    str x10, [sp, #8] // 8-byte Folded Spill
-; CHECK-CAS-O0-NEXT:    subs x16, x10, #64 // =64
-; CHECK-CAS-O0-NEXT:    subs x13, x8, #64 // =64
+; CHECK-CAS-O0-NEXT:    subs x16, x10, #64
+; CHECK-CAS-O0-NEXT:    subs x13, x8, #64
 ; CHECK-CAS-O0-NEXT:    lsl x14, x15, x10
 ; CHECK-CAS-O0-NEXT:    lsr x13, x15, x13
 ; CHECK-CAS-O0-NEXT:    orr x13, x13, x12
 ; CHECK-CAS-O0-NEXT:    lsl x15, x15, x16
-; CHECK-CAS-O0-NEXT:    subs x16, x10, #64 // =64
+; CHECK-CAS-O0-NEXT:    subs x16, x10, #64
 ; CHECK-CAS-O0-NEXT:    csel x14, x14, x12, lo
-; CHECK-CAS-O0-NEXT:    subs x16, x10, #64 // =64
+; CHECK-CAS-O0-NEXT:    subs x16, x10, #64
 ; CHECK-CAS-O0-NEXT:    csel x13, x13, x15, lo
-; CHECK-CAS-O0-NEXT:    subs x15, x10, #0 // =0
+; CHECK-CAS-O0-NEXT:    subs x15, x10, #0
 ; CHECK-CAS-O0-NEXT:    csel x13, x12, x13, eq
 ; CHECK-CAS-O0-NEXT:    orr x9, x9, x14
 ; CHECK-CAS-O0-NEXT:    orr x12, x12, x13
@@ -467,22 +467,22 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
 ; CHECK-CAS-O0-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
 ; CHECK-CAS-O0-NEXT:    mov v0.d[1], x12
 ; CHECK-CAS-O0-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
-; CHECK-CAS-O0-NEXT:    subs x13, x10, #64 // =64
-; CHECK-CAS-O0-NEXT:    subs x8, x8, #64 // =64
+; CHECK-CAS-O0-NEXT:    subs x13, x10, #64
+; CHECK-CAS-O0-NEXT:    subs x8, x8, #64
 ; CHECK-CAS-O0-NEXT:    lsl x8, x12, x8
 ; CHECK-CAS-O0-NEXT:    orr x8, x8, x9, lsr #0
 ; CHECK-CAS-O0-NEXT:    lsr x12, x12, x13
-; CHECK-CAS-O0-NEXT:    subs x13, x10, #64 // =64
+; CHECK-CAS-O0-NEXT:    subs x13, x10, #64
 ; CHECK-CAS-O0-NEXT:    csel x8, x8, x12, lo
-; CHECK-CAS-O0-NEXT:    subs x10, x10, #0 // =0
+; CHECK-CAS-O0-NEXT:    subs x10, x10, #0
 ; CHECK-CAS-O0-NEXT:    csel x10, x9, x8, eq
 ; CHECK-CAS-O0-NEXT:    stxp w8, x9, x10, [x11]
 ; CHECK-CAS-O0-NEXT:    cbnz w8, .LBB4_1
 ; CHECK-CAS-O0-NEXT:  // %bb.2: // %atomicrmw.end
 ; CHECK-CAS-O0-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-CAS-O0-NEXT:    ldr x8, [sp, #56] // 8-byte Folded Reload
 ; CHECK-CAS-O0-NEXT:    str q0, [x8]
-; CHECK-CAS-O0-NEXT:    add sp, sp, #64 // =64
+; CHECK-CAS-O0-NEXT:    add sp, sp, #64
 ; CHECK-CAS-O0-NEXT:    ret
 
     %r = load atomic i128, i128* %p monotonic, align 16