fugit

CHANGELOG.md

@@ -13,6 +13,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- Usw `fugit`-based time types instead of `embedded-time`
 - Update gpios: add `DynamicPin`, add default modes, reexport pins, resort generics, etc.
 - Improved RCC infrastructure.
 - RTC support has been rewritten.

Cargo.toml

@@ -20,7 +20,6 @@ features = ["stm32f746", "rt"]
 as-slice = "0.2"
 cortex-m = "0.7.4"
 cortex-m-rt = ">=0.6.15, <0.8"
-embedded-time = "0.12.0"
 nb = "1.0"
 stm32f7 = "0.14.0"
 micromath = "2.0"
@@ -29,6 +28,7 @@ stm32-fmc = { version = "0.2.0", features = ["sdram"], optional = true }
 rand_core = "0.6"
 bxcan = "0.6"
 bare-metal = "1.0"
+fugit = "0.3.5"
 
 [dependencies.time]
 version = "0.3"

src/adc.rs

@@ -257,7 +257,7 @@ macro_rules! adc_hal {
                 // The reference manual says that a stabilization time is needed after power_up,
                 // this time can be found in the datasheets.
                 // for STM32F7xx : delay(216_000_000/800_000)= delay(270 cycles) = 1.25us
-                delay(self.clocks.sysclk().0 / 800_000);
+                delay(self.clocks.sysclk().raw() / 800_000);
             }
 
             // 15.3.1 ADC on-off control
@@ -466,7 +466,7 @@ impl Adc<ADC1> {
 
             // The reference manual says that a stabilization time is needed after the powering the
             // sensor, this time can be found in the datasheets.
-            delay(self.clocks.sysclk().0 / 80_000);
+            delay(self.clocks.sysclk().raw() / 80_000);
             true
         } else {
             false

src/delay.rs

@@ -50,7 +50,7 @@ impl DelayUs<u32> for Delay {
         // The SysTick Reload Value register supports values between 1 and 0x00FFFFFF.
         const MAX_RVR: u32 = 0x00FF_FFFF;
 
-        let mut total_rvr = us * (self.clocks.hclk().0 / 8_000_000);
+        let mut total_rvr = us * (self.clocks.hclk().raw() / 8_000_000);
 
         while total_rvr != 0 {
             let current_rvr = if total_rvr <= MAX_RVR {

src/fmc.rs

@@ -6,9 +6,9 @@
 use stm32_fmc::FmcPeripheral;
 use stm32_fmc::{AddressPinSet, PinsSdram, Sdram, SdramChip, SdramPinSet, SdramTargetBank};
 
-use crate::embedded_time::rate::Hertz;
 use crate::pac;
 use crate::rcc::{Clocks, Enable, Reset};
+use fugit::HertzU32 as Hertz;
 
 use crate::gpio::{self, Alternate};
 
@@ -75,7 +75,7 @@ unsafe impl FmcPeripheral for FMC {
 
     fn source_clock_hz(&self) -> u32 {
         // FMC block is clocked by HCLK
-        self.hclk.0
+        self.hclk.raw()
     }
 }
 

src/i2c.rs

@@ -3,11 +3,11 @@
 
 // NB : this implementation started as a modified copy of https://github.com/stm32-rs/stm32f1xx-hal/blob/master/src/i2c.rs
 
-use crate::embedded_time::rate::Hertz;
 use crate::gpio::{self, Alternate, OpenDrain};
 use crate::hal::blocking::i2c::{Read, Write, WriteRead};
 use crate::pac::{DWT, I2C1, I2C2, I2C3};
 use crate::rcc::{Clocks, Enable, GetBusFreq, RccBus, Reset};
+use fugit::HertzU32 as Hertz;
 use nb::Error::{Other, WouldBlock};
 use nb::{Error as NbError, Result as NbResult};
 
@@ -43,22 +43,16 @@ pub enum Mode {
 }
 
 impl Mode {
-    pub fn standard<F: Into<Hertz>>(frequency: F) -> Self {
-        Mode::Standard {
-            frequency: frequency.into(),
-        }
+    pub fn standard(frequency: Hertz) -> Self {
+        Mode::Standard { frequency }
     }
 
-    pub fn fast<F: Into<Hertz>>(frequency: F) -> Self {
-        Mode::Fast {
-            frequency: frequency.into(),
-        }
+    pub fn fast(frequency: Hertz) -> Self {
+        Mode::Fast { frequency }
     }
 
-    pub fn fast_plus<F: Into<Hertz>>(frequency: F) -> Self {
-        Mode::FastPlus {
-            frequency: frequency.into(),
-        }
+    pub fn fast_plus(frequency: Hertz) -> Self {
+        Mode::FastPlus { frequency }
     }
 }
 
@@ -89,7 +83,7 @@ pub struct I2c<I2C, SCL, SDA> {
     i2c: I2C,
     pins: (SCL, SDA),
     mode: Mode,
-    pclk: u32,
+    pclk: Hertz,
 }
 
 /// embedded-hal compatible blocking I2C implementation
@@ -209,7 +203,7 @@ fn blocking_i2c<I2C, SCL, SDA>(
     clocks: Clocks,
     data_timeout_us: u32,
 ) -> BlockingI2c<I2C, SCL, SDA> {
-    let sysclk_mhz = clocks.sysclk().0 / 1_000_000;
+    let sysclk_mhz = clocks.sysclk().to_MHz();
     BlockingI2c {
         nb: i2c,
         data_timeout: data_timeout_us * sysclk_mhz,
@@ -405,7 +399,7 @@ macro_rules! hal {
                     $I2CX::enable(apb);
                     $I2CX::reset(apb);
 
-                    let pclk = <$I2CX as RccBus>::Bus::get_frequency(&clocks).0;
+                    let pclk = <$I2CX as RccBus>::Bus::get_frequency(&clocks);
 
                     let mut i2c = I2c { i2c, pins, mode, pclk };
                     i2c.init();
@@ -428,9 +422,9 @@ macro_rules! hal {
                     let dnf = self.i2c.cr1.read().dnf().bits();
 
                     let i2c_timingr: I2cTiming =  match self.mode {
-                        Mode::Standard{ frequency } => calculate_timing(I2C_STANDARD_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf ),
-                        Mode::Fast{ frequency } => calculate_timing(I2C_FAST_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf),
-                        Mode::FastPlus{ frequency } => calculate_timing(I2C_FAST_PLUS_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf ),
+                        Mode::Standard{ frequency } => calculate_timing(I2C_STANDARD_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf ),
+                        Mode::Fast{ frequency } => calculate_timing(I2C_FAST_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf),
+                        Mode::FastPlus{ frequency } => calculate_timing(I2C_FAST_PLUS_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf ),
                         Mode::Custom{ timing_r } => {
                             I2cTiming{
                                 presc:  ((timing_r & 0xf000_0000) >> 28 ) as u8,

src/lib.rs

@@ -24,7 +24,6 @@ compile_error!(
 );
 
 pub(crate) use embedded_hal as hal;
-pub use embedded_time;
 
 #[cfg(feature = "stm32f722")]
 pub use stm32f7::stm32f7x2 as pac;
@@ -183,3 +182,18 @@ fn stripped_type_name<T>() -> &'static str {
     let p = s.split("::");
     p.last().unwrap()
 }
+
+/// Bits per second
+pub type BitsPerSecond = fugit::HertzU32;
+
+/// Extension trait that adds convenience methods to the `u32` type
+pub trait U32Ext {
+    /// Wrap in `Bps`
+    fn bps(self) -> BitsPerSecond;
+}
+
+impl U32Ext for u32 {
+    fn bps(self) -> BitsPerSecond {
+        BitsPerSecond::from_raw(self)
+    }
+}

src/ltdc.rs

@@ -83,7 +83,7 @@ impl<T: 'static + SupportedWord> DisplayController<T> {
         // Get base clock and PLLM divisor
         let base_clk: u32;
         match &hse {
-            Some(hse) => base_clk = hse.freq.0,
+            Some(hse) => base_clk = hse.freq.raw(),
             // If no HSE is provided, we use the HSI clock at 16 MHz
             None => base_clk = 16_000_000,
         }

src/otg_fs.rs

@@ -5,12 +5,12 @@
 
 use crate::pac;
 
-use crate::embedded_time::rate::Hertz;
 use crate::gpio::{
     gpioa::{PA11, PA12},
     Alternate,
 };
 use crate::rcc::{Clocks, Enable, Reset};
+use fugit::HertzU32 as Hertz;
 
 pub use synopsys_usb_otg::UsbBus;
 use synopsys_usb_otg::UsbPeripheral;
@@ -66,7 +66,7 @@ unsafe impl UsbPeripheral for USB {
     }
 
     fn ahb_frequency_hz(&self) -> u32 {
-        self.hclk.0
+        self.hclk.raw()
     }
 }
 

src/otg_hs.rs

@@ -10,7 +10,7 @@ use crate::gpio::{
     Alternate,
 };
 use crate::rcc::{Clocks, Enable, Reset};
-use embedded_time::rate::Hertz;
+use fugit::{HertzU32 as Hertz, RateExtU32};
 
 #[cfg(feature = "usb_hs_phy")]
 use synopsys_usb_otg::PhyType;
@@ -51,7 +51,7 @@ impl USB {
             pin_dp: pins.1,
             hclk: clocks.hclk(),
             #[cfg(feature = "usb_hs_phy")]
-            hse: clocks.hse().unwrap_or_else(|| Hertz(0)),
+            hse: clocks.hse().unwrap_or_else(|| 0.Hz()),
         }
     }
 
@@ -109,7 +109,7 @@ unsafe impl UsbPeripheral for USB {
     }
 
     fn ahb_frequency_hz(&self) -> u32 {
-        self.hclk.0
+        self.hclk.raw()
     }
 
     #[cfg(feature = "usb_hs_phy")]
@@ -135,7 +135,7 @@ unsafe impl UsbPeripheral for USB {
         };
 
         // Calculate PLL1SEL
-        let pll1sel = match self.hse.0 {
+        let pll1sel = match self.hse.raw() {
             12_000_000 => 0b000,
             12_500_000 => 0b001,
             16_000_000 => 0b011,

src/prelude.rs

@@ -1,4 +1,4 @@
-pub use embedded_time::{duration::Extensions as _, rate::Extensions as _};
+pub use fugit::{ExtU32 as _, RateExtU32 as _};
 
 #[cfg(feature = "fmc")]
 pub use crate::fmc::FmcExt as _stm327xx_hal_fmc_FmcExt;
@@ -8,3 +8,4 @@ pub use crate::hal::digital::v2::{InputPin, OutputPin};
 pub use crate::hal::prelude::*;
 pub use crate::rcc::RccExt as _stm32f7xx_hal_rcc_RccExt;
 pub use crate::rng::RngExt as _;
+pub use crate::U32Ext as _;