Skip to content

Commit d45a0f6

Browse files
committed
Add serial test for read write methods and different baud rates
1 parent 249d684 commit d45a0f6

File tree

1 file changed

+40
-29
lines changed

1 file changed

+40
-29
lines changed

testsuite/tests/uart.rs

Lines changed: 40 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -6,14 +6,17 @@ use testsuite as _;
66

77
use stm32f3xx_hal as hal;
88

9-
use hal::gpio::{
10-
gpioa::{PA10, PA2, PA3, PA9},
11-
gpiob::{PB10, PB11},
12-
};
139
use hal::gpio::{OpenDrain, PushPull, AF7};
1410
use hal::pac;
1511
use hal::prelude::*;
1612
use hal::serial::Serial;
13+
use hal::{
14+
gpio::{
15+
gpioa::{PA10, PA2, PA3, PA9},
16+
gpiob::{PB10, PB11},
17+
},
18+
rcc::{Clocks, APB2},
19+
};
1720

1821
use core::array::IntoIter;
1922

@@ -23,6 +26,8 @@ struct State {
2326
serial1: Option<Serial<pac::USART1, (PA9<AF7<PushPull>>, PA10<AF7<PushPull>>)>>,
2427
serial_slow: Option<Serial<pac::USART2, (PA2<AF7<PushPull>>, PA3<AF7<OpenDrain>>)>>,
2528
serial_fast: Option<Serial<pac::USART3, (PB10<AF7<PushPull>>, PB11<AF7<OpenDrain>>)>>,
29+
clocks: Clocks,
30+
apb2: APB2,
2631
}
2732

2833
const TEST_MSG: [u8; 8] = [0xD, 0xE, 0xA, 0xD, 0xB, 0xE, 0xE, 0xF];
@@ -31,7 +36,7 @@ const TEST_MSG: [u8; 8] = [0xD, 0xE, 0xA, 0xD, 0xB, 0xE, 0xE, 0xF];
3136
mod tests {
3237
use super::*;
3338
use defmt::{self, assert, assert_eq, unwrap};
34-
use testsuite::{SerialPair, CrossSerialPair1, CrossSerialPair2};
39+
use testsuite::{CrossSerialPair1, CrossSerialPair2, SerialPair};
3540

3641
#[init]
3742
fn init() -> super::State {
@@ -90,37 +95,39 @@ mod tests {
9095
clocks,
9196
&mut rcc.apb1,
9297
)),
98+
clocks,
99+
apb2: rcc.apb2,
93100
}
94-
95-
// super::State { serial, clocks, apb2: rcc.apb2 }
96101
}
97102

98103
// FIXME:
99-
// Problems:
100-
// 1. if we split, we can not join (no runtime informatino which pins where associated with the
101-
// uart)
102-
// 2. if we free, we could crate a new one,
103-
// 3. but to use the serial we **have** to split, so this is useless
104-
// 4. So we have to implement join and than split on the whole uart to gain the uart + pins again.
105104
// 5. We should introduce the builder pattern (config pattern instead of dirtctl setting the
106105
// buad rate)
107106
// 6. No way to set parity etc.
108-
// 7. We have to implement read and write directly on the peripheral
109-
// - Maybe this should also follow
110-
//
111-
// #[test]
112-
// fn send_receive_split_fast(state: &mut super::State) {
113-
// let (usart, pins) = unwrap!(state.serial1.take()).free();
114-
// let mut serial = Serial::usart1(usart, pins, 115200.Bd(), state.clocks, &mut state.apb2);
115-
// let (mut tx, mut rx) = serial.split();
116-
// for i in &TEST_MSG {
117-
// nb::block!(tx.write(*i));
118-
// let c = unwrap!(nb::block!(rx.read()));
119-
// assert_eq!(c, *i);
120-
// }
121-
122-
// state.serial = Some(serial);
123-
// }
107+
108+
#[test]
109+
fn test_many_baudrates(state: &mut super::State) {
110+
use hal::time::rate::Baud;
111+
for baudrate in &[
112+
Baud(1200),
113+
Baud(9600),
114+
Baud(19200),
115+
Baud(38400),
116+
Baud(57600),
117+
Baud(115200),
118+
Baud(230400),
119+
Baud(460800),
120+
] {
121+
let (usart, pins) = unwrap!(state.serial1.take()).free();
122+
let mut serial = Serial::new(usart, pins, *baudrate, state.clocks, &mut state.apb2);
123+
for i in &TEST_MSG {
124+
unwrap!(nb::block!(serial.write(*i)));
125+
let c = unwrap!(nb::block!(serial.read()));
126+
assert_eq!(c, *i);
127+
}
128+
state.serial1 = Some(serial);
129+
}
130+
}
124131

125132
#[test]
126133
fn send_receive_split(state: &mut super::State) {
@@ -161,4 +168,8 @@ mod tests {
161168
// TODO: Check the parity. But currently, there is no way to configure the parity
162169
// #[test]
163170
// fn check_parity(state: &mut super::State) { }
171+
172+
// TODO: Test interrupts
173+
// #[test]
174+
// fn enable_interrupt_and_wait_for_fire(state: &mut super::State) {}
164175
}

0 commit comments

Comments
 (0)