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Update codegen for simd wasm intrinsics with LLVM 13 #1203

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Merged
merged 3 commits into from
Aug 23, 2021

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alexcrichton
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@alexcrichton alexcrichton commented Aug 22, 2021

Since LLVM 12 a number of simd wasm intrinsics have been updated to no
longer use custom intrinsics in LLVM but rather pattern-match other
types of IR. This commit updates our support in std::arch to use the
patterns the LLVM recognizes, removing usage of custom intrinsics where
possible.

Affected intrinsics are:

  • v128_load{32,64}_zero
  • v128_load{8,16,32,64}_lane
  • v128_store{8,16,32,64}_lane
  • i8x16_popcnt
  • f{32x4,64x2}_p{min,max}
  • *_extmul_*

Documentation around the load/store intrinsics have been updated to
indicate that the safe alternatives are suitable replacements.

Closes #1202

Since LLVM 12 a number of simd wasm intrinsics have been updated to no
longer use custom intrinsics in LLVM but rather pattern-match other
types of IR. This commit updates our support in `std::arch` to use the
patterns the LLVM recognizes, removing usage of custom intrinsics where
possible.

Affected intrinsics are:

* `v128_load{32,64}_zero`
* `v128_load{8,16,32,64}_lane`
* `v128_store{8,16,32,64}_lane`
* `i8x16_popcnt`
* `f{32x4,64x2}_p{min,max}`
* `*_extmul_*`

Documentation around the load/store intrinsics have been updated to
indicate that the safe alternatives are suitable replacements.
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r? @Amanieu

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@alexcrichton
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Looks like armv7 is also failing with:


failures:

---- core_arch::arm_shared::neon::assert_vgetq_lane_p64_vmov_32 stdout ----
disassembly for stdarch_test_shim_vgetq_lane_p64_vmov_32: 
	 0: vmov r0, r1, d0
	 1: ldr r2, [pc, #16] ; 35a38 <stdarch_test_shim_vgetq_lane_p64_vmov_32+0x1c>
	 2: ldr r3, [pc, #16] ; 35a3c <stdarch_test_shim_vgetq_lane_p64_vmov_32+0x20>
	 3: add r2, pc, r2
	 4: ldr r3, [pc, r3]
	 5: str r2, [r3]
	 6: bx lr
	 7: .word 0x000e52b4
	 8: .word 0x0019a568
thread 'core_arch::arm_shared::neon::assert_vgetq_lane_p64_vmov_32' panicked at 'failed to find instruction `vmov.32` in the disassembly', crates/stdarch-test/src/lib.rs:154:9
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace

---- core_arch::arm_shared::neon::assert_vgetq_lane_s64_vmov_32 stdout ----
disassembly for stdarch_test_shim_vgetq_lane_s64_vmov_32: 
	 0: vmov r0, r1, d0
	 1: ldr r2, [pc, #16] ; 35a84 <stdarch_test_shim_vgetq_lane_s64_vmov_32+0x1c>
	 2: ldr r3, [pc, #16] ; 35a88 <stdarch_test_shim_vgetq_lane_s64_vmov_32+0x20>
	 3: add r2, pc, r2
	 4: ldr r3, [pc, r3]
	 5: str r2, [r3]
	 6: bx lr
	 7: .word 0x000e533f
	 8: .word 0x0019a51c
thread 'core_arch::arm_shared::neon::assert_vgetq_lane_s64_vmov_32' panicked at 'failed to find instruction `vmov.32` in the disassembly', crates/stdarch-test/src/lib.rs:154:9

---- core_arch::arm_shared::neon::assert_vgetq_lane_u64_vmov_32 stdout ----
disassembly for stdarch_test_shim_vgetq_lane_u64_vmov_32: 
	 0: vmov r0, r1, d1
	 1: ldr r2, [pc, #16] ; 358c8 <stdarch_test_shim_vgetq_lane_u64_vmov_32+0x1c>
	 2: ldr r3, [pc, #16] ; 358cc <stdarch_test_shim_vgetq_lane_u64_vmov_32+0x20>
	 3: add r2, pc, r2
	 4: ldr r3, [pc, r3]
	 5: str r2, [r3]
	 6: bx lr
	 7: .word 0x000e4feb
	 8: .word 0x0019a6d8
thread 'core_arch::arm_shared::neon::assert_vgetq_lane_u64_vmov_32' panicked at 'failed to find instruction `vmov.32` in the disassembly', crates/stdarch-test/src/lib.rs:154:9


failures:
    core_arch::arm_shared::neon::assert_vgetq_lane_p64_vmov_32
    core_arch::arm_shared::neon::assert_vgetq_lane_s64_vmov_32
    core_arch::arm_shared::neon::assert_vgetq_lane_u64_vmov_32

I've pushed a commit to disable fail-fast to let it get to finishing wasm intrinsics on CI, and I'll open an issue when CI finishes.

@alexcrichton
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Ok the run finished at https://github.com/rust-lang/stdarch/actions/runs/1156300010 and looks like armv7 is the only one that's failing. I've reverted the fail-fast bit but I believe this otherwise fixes the wasm bits for llvm 11

@Amanieu Amanieu merged commit 89b0e35 into rust-lang:master Aug 23, 2021
@Amanieu
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Amanieu commented Aug 23, 2021

I'll look into the armv7 issues separately, it seems to just be changed codegen from the new LLVM.

@alexcrichton alexcrichton deleted the new-wasm-simd-codegen branch August 23, 2021 05:18
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WASM CI failing
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