UB in inline-asm delay function

[ByteNacked]

UB in higher opt levels with inline-asm feature, caused by forgotten asm clobber in asm::delay function.

Example fix:

asm!("1:
      nop
      subs $0, $$1
      bne.n 1b"
      : "+r"(_n / 4 + 1)
      :
      :
      : "cpsr" // <= Added here
      : "volatile");

[jonas-schievink]

Oh, you need to clobber the status register explicitly? That seems very easy to forget, we should audit all asm for this.

[adamgreig]

I've done an audit of all occurrences of asm! I could find in rust-embedded and this is the only instance I found which updates the condition flags. Should the fix be cpsr or cc clobber?

[therealprof]

cspr should be the right one since it's the name of the register containing the condition flags on ARM. cc is some GCC architecture independent magic name to indicate the register holding the condition flags, but I'm not even sure it's universally applicable to non-GCC inline assembly...