ARM: dts: rp1: Add a safe I2C SDA hold time

Failing to set a reasonable SDA hold time can cause SDA to change too
close to the falling edge of SCL. 300ns is the recommended minimum
interval between the two at 100kHz and 400kHz, and also seems to
work at 1MHz, so use that.

See: #5914

Signed-off-by: Phil Elwell <[email protected]>

Author: pelwell

arch/arm/boot/dts/broadcom/rp1.dtsi

@@ -307,6 +307,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -317,6 +318,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -327,6 +329,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -337,6 +340,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -347,6 +351,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -357,6 +362,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};
 
@@ -367,6 +373,7 @@
 			clocks = <&rp1_clocks RP1_CLK_SYS>;
 			i2c-scl-rising-time-ns = <65>;
 			i2c-scl-falling-time-ns = <100>;
+			i2c-sda-hold-time-ns = <300>;
 			status = "disabled";
 		};