Rollup merge of rust-lang#130549 - biabbas:riscv32_wrs_vxworks, r=nnethercote

matthiaskrgr · web-flow · commit 6a06555427fd · 2024-09-25T10:09:22.000+02:00
Add RISC-V vxworks targets

Risc-V 32 and RISC-V 64 targets are to be added in the target list.
diff --git a/std/src/sys/alloc/unix.rs b/std/src/sys/alloc/unix.rs
@@ -71,6 +71,7 @@ cfg_if::cfg_if! {
         }
     } else {
         #[inline]
+        #[cfg_attr(target_os = "vxworks", allow(unused_unsafe))]
         unsafe fn aligned_malloc(layout: &Layout) -> *mut u8 {
             let mut out = ptr::null_mut();
             // We prefer posix_memalign over aligned_alloc since it is more widely available, and

Original file line number	Diff line number	Diff line change
`@@ -71,6 +71,7 @@ cfg_if::cfg_if! {`
`71`	`71`	`}`
`72`	`72`	`} else {`
`73`	`73`	`#[inline]`
	`74`	`+ #[cfg_attr(target_os = "vxworks", allow(unused_unsafe))]`
`74`	`75`	`unsafe fn aligned_malloc(layout: &Layout) -> *mut u8 {`
`75`	`76`	`let mut out = ptr::null_mut();`
`76`	`77`	`// We prefer posix_memalign over aligned_alloc since it is more widely available, and`