revert un-relatedd code

Signed-off-by: chenwei.sun <[email protected]>

Author: tomflinda

clang/lib/DPCT/RulesAsm/AsmMigration.cpp

@@ -51,18 +51,17 @@ class SYCLGenBase {
   SmallString<4> NewLine;
   SmallVector<SmallString<10>, 4> VecExprTypeRecord;
   raw_ostream *Stream;
-
+  InlineAsmContext &Context;
   bool MigrationStopped = false;
 
 protected:
   const InlineAsmInstruction *CurrInst = nullptr;
   const GCCAsmStmt *GAS;
-  InlineAsmContext &Context;
+
   class BlockDelimiterGuard {
     SYCLGenBase &CodeGen;
 
   public:
-    InlineAsmContext &getContext() { return CodeGen.Context; }
 
     BlockDelimiterGuard(SYCLGenBase &CG) : CodeGen(CG) {
       CodeGen.OS() << "{";
@@ -1925,17 +1924,23 @@ class SYCLGen : public SYCLGenBase {
     if (!Inst)
       return SYCLGenError();
     if (Inst->hasAttr(InstAttr::eq))
-      OS() << ", " << "std::equal_to<>()";
+      OS() << ", "
+           << "std::equal_to<>()";
     else if (Inst->hasAttr(InstAttr::ne))
-      OS() << ", " << "std::not_equal_to<>()";
+      OS() << ", "
+           << "std::not_equal_to<>()";
     else if (Inst->hasAttr(InstAttr::lt))
-      OS() << ", " << "std::less<>()";
+      OS() << ", "
+           << "std::less<>()";
     else if (Inst->hasAttr(InstAttr::le))
-      OS() << ", " << "std::less_equal<>()";
+      OS() << ", "
+           << "std::less_equal<>()";
     else if (Inst->hasAttr(InstAttr::gt))
-      OS() << ", " << "std::greater<>()";
+      OS() << ", "
+           << "std::greater<>()";
     else if (Inst->hasAttr(InstAttr::ge))
-      OS() << ", " << "std::greater_equal<>()";
+      OS() << ", "
+           << "std::greater_equal<>()";
     else
       return SYCLGenError();
     return SYCLGenSuccess();
@@ -2510,10 +2515,11 @@ class SYCLGen : public SYCLGenBase {
       Op = std::move(NewOp);
     }
 
-    bool HasHalfOrBfloat16 = SrcType->getKind() == InlineAsmBuiltinType::f16 ||
-                             DesType->getKind() == InlineAsmBuiltinType::f16 ||
-                             SrcType->getKind() == InlineAsmBuiltinType::bf16 ||
-                             DesType->getKind() == InlineAsmBuiltinType::bf16;
+    bool HasHalfOrBfloat16 =
+        SrcType->getKind() == InlineAsmBuiltinType::f16 ||
+        DesType->getKind() == InlineAsmBuiltinType::f16 ||
+        SrcType->getKind() == InlineAsmBuiltinType::bf16 ||
+        DesType->getKind() == InlineAsmBuiltinType::bf16;
     if (DpctGlobalInfo::useIntelDeviceMath() && HasHalfOrBfloat16) {
       insertHeader(HeaderType::HT_SYCL_Math);
       if (SrcNeedBitCast)
@@ -2653,7 +2659,8 @@ class SYCLGen : public SYCLGenBase {
         OS() << ')';
         if (Inst->getOutputOperand()->getType() != T) {
           OS() << ".template as<" << MapNames::getClNamespace() << "vec<"
-               << OpTyStr[3] << ", 1>" << ">().x()";
+               << OpTyStr[3] << ", 1>"
+               << ">().x()";
         }
       } else
         // fma.bf16 is not supported now.