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maksleventalmahesh-attarde
makslevental
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mahesh-attarde
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[mlir][NFC] update mlir/Dialect create APIs (29/n) (llvm#150642)
See llvm#147168 for more info.
1 parent 25c22d8 commit 1ed0d16

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+63
-61
lines changed

5 files changed

+63
-61
lines changed

‎mlir/test/mlir-tblgen/rewriter-attributes-properties.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ def test1 : Pat<(AOp (BOp:$x $y), $_), (AOp $x, $y)>;
4444
// CHECK: test::AOp::Properties tblgen_props;
4545
// CHECK: tblgen_values.push_back((*x.getODSResults(0).begin()));
4646
// CHECK: tblgen_props.y = ::llvm::dyn_cast_if_present<decltype(tblgen_props.y)>(y);
47-
// CHECK: tblgen_AOp_0 = rewriter.create<test::AOp>(odsLoc, tblgen_types, tblgen_values, tblgen_props);
47+
// CHECK: tblgen_AOp_0 = test::AOp::create(rewriter, odsLoc, tblgen_types, tblgen_values, tblgen_props);
4848

4949
// Note: These use strings to pick up a non-trivial storage/interface type
5050
// difference.

‎mlir/test/mlir-tblgen/rewriter-indexing.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ def test2 : Pat<(COp $attr1, $op1, $attr2, (AOp $op2)),
5555
// We expect ODSOperand 0 here, the attribute before the operand in BOp
5656
// definition shouldn't shift the counter.
5757
// CHECK: op1 = (*castedOp0.getODSOperands(0).begin()).getDefiningOp();
58-
// CHECK: rewriter.create<test::BOp>((*a.getODSResults(0).begin()).getLoc()
58+
// CHECK: test::BOp::create(rewriter, (*a.getODSResults(0).begin()).getLoc()
5959
def test3 : Pat<(BOp $attr, (AOp:$a $input)),
6060
(BOp $attr, (AOp $input), (location $a))>;
6161

‎mlir/tools/mlir-tblgen/RewriterGen.cpp

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -632,7 +632,8 @@ void PatternEmitter::emitOpMatch(DagNode tree, StringRef opName, int depth) {
632632
++opArgIdx;
633633
continue;
634634
}
635-
if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
635+
if (auto *operand =
636+
llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
636637
if (argTree.isVariadic()) {
637638
if (!operand->isVariadic()) {
638639
auto error = formatv("variadic DAG construct can't match op {0}'s "
@@ -1695,7 +1696,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
16951696

16961697
// Then create the op.
16971698
os.scope("", "\n}\n").os
1698-
<< formatv("{0} = rewriter.create<{1}>({2}, tblgen_values, {3});",
1699+
<< formatv("{0} = {1}::create(rewriter, {2}, tblgen_values, {3});",
16991700
valuePackName, resultOp.getQualCppClassName(), locToUse,
17001701
useProperties ? "tblgen_props" : "tblgen_attrs");
17011702
return resultValue;
@@ -1714,7 +1715,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
17141715
// aggregate-parameter builders.
17151716
createSeparateLocalVarsForOpArgs(tree, childNodeNames);
17161717

1717-
os.scope().os << formatv("{0} = rewriter.create<{1}>({2}", valuePackName,
1718+
os.scope().os << formatv("{0} = {1}::create(rewriter, {2}", valuePackName,
17181719
resultOp.getQualCppClassName(), locToUse);
17191720
supplyValuesForOpArgs(tree, childNodeNames, depth);
17201721
os << "\n );\n}\n";
@@ -1753,7 +1754,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree, int resultIndex,
17531754
resultIndex + i);
17541755
}
17551756
}
1756-
os << formatv("{0} = rewriter.create<{1}>({2}, tblgen_types, "
1757+
os << formatv("{0} = {1}::create(rewriter, {2}, tblgen_types, "
17571758
"tblgen_values, {3});\n",
17581759
valuePackName, resultOp.getQualCppClassName(), locToUse,
17591760
useProperties ? "tblgen_props" : "tblgen_attrs");
@@ -1772,8 +1773,8 @@ void PatternEmitter::createSeparateLocalVarsForOpArgs(
17721773

17731774
int valueIndex = 0; // An index for uniquing local variable names.
17741775
for (int argIndex = 0, e = resultOp.getNumArgs(); argIndex < e; ++argIndex) {
1775-
const auto *operand =
1776-
llvm::dyn_cast_if_present<NamedTypeConstraint *>(resultOp.getArg(argIndex));
1776+
const auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(
1777+
resultOp.getArg(argIndex));
17771778
// We do not need special handling for attributes or properties.
17781779
if (!operand)
17791780
continue;
@@ -1828,7 +1829,8 @@ void PatternEmitter::supplyValuesForOpArgs(
18281829

18291830
Argument opArg = resultOp.getArg(argIndex);
18301831
// Handle the case of operand first.
1831-
if (auto *operand = llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
1832+
if (auto *operand =
1833+
llvm::dyn_cast_if_present<NamedTypeConstraint *>(opArg)) {
18321834
if (!operand->name.empty())
18331835
os << "/*" << operand->name << "=*/";
18341836
os << childNodeNames.lookup(argIndex);

‎mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -397,10 +397,9 @@ static void emitAvailabilityQueryForBitEnum(const Record &enumDef,
397397
avail.getMergeInstanceType(), avail.getQueryFnName(),
398398
enumName);
399399

400-
os << formatv(
401-
" assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
402-
" && \"cannot have more than one bit set\");\n",
403-
underlyingType);
400+
os << formatv(" assert(::llvm::popcount(static_cast<{0}>(value)) <= 1"
401+
" && \"cannot have more than one bit set\");\n",
402+
underlyingType);
404403

405404
os << " switch (value) {\n";
406405
for (const auto &caseSpecPair : classCasePair.getValue()) {
@@ -933,7 +932,8 @@ static void emitOperandDeserialization(const Operator &op, ArrayRef<SMLoc> loc,
933932
// Process operands/attributes
934933
for (unsigned i = 0, e = op.getNumArgs(); i < e; ++i) {
935934
auto argument = op.getArg(i);
936-
if (auto *valueArg = llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
935+
if (auto *valueArg =
936+
llvm::dyn_cast_if_present<NamedTypeConstraint *>(argument)) {
937937
if (valueArg->isVariableLength()) {
938938
if (i != e - 1) {
939939
PrintFatalError(
@@ -1044,7 +1044,7 @@ static void emitDeserializationFunction(const Record *attrClass,
10441044
emitDecorationDeserialization(op, " ", valueID, attributes, os);
10451045

10461046
os << formatv(" Location loc = createFileLineColLoc(opBuilder);\n");
1047-
os << formatv(" auto {1} = opBuilder.create<{0}>(loc, {2}, {3}, {4}); "
1047+
os << formatv(" auto {1} = {0}::create(opBuilder, loc, {2}, {3}, {4}); "
10481048
"(void){1};\n",
10491049
op.getQualCppClassName(), opVar, resultTypes, operands,
10501050
attributes);

‎mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp

Lines changed: 46 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -52,33 +52,33 @@ Value createPredicate(OpBuilder &builder, tblgen::Pred pred) {
5252
}
5353
if (combiner == "PredCombinerAnd") {
5454
auto op =
55-
builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
55+
irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
5656
return op.getOutput();
5757
}
5858
auto op =
59-
builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
59+
irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
6060
return op.getOutput();
6161
}
6262
}
6363

6464
std::string condition = pred.getCondition();
6565
// Build a CPredOp to match the C constraint built.
66-
irdl::CPredOp op = builder.create<irdl::CPredOp>(
67-
UnknownLoc::get(ctx), StringAttr::get(ctx, condition));
66+
irdl::CPredOp op = irdl::CPredOp::create(builder, UnknownLoc::get(ctx),
67+
StringAttr::get(ctx, condition));
6868
return op;
6969
}
7070

7171
Value typeToConstraint(OpBuilder &builder, Type type) {
7272
MLIRContext *ctx = builder.getContext();
7373
auto op =
74-
builder.create<irdl::IsOp>(UnknownLoc::get(ctx), TypeAttr::get(type));
74+
irdl::IsOp::create(builder, UnknownLoc::get(ctx), TypeAttr::get(type));
7575
return op.getOutput();
7676
}
7777

7878
Value baseToConstraint(OpBuilder &builder, StringRef baseClass) {
7979
MLIRContext *ctx = builder.getContext();
80-
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
81-
StringAttr::get(ctx, baseClass));
80+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
81+
StringAttr::get(ctx, baseClass));
8282
return op.getOutput();
8383
}
8484

@@ -179,7 +179,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
179179
return createTypeConstraint(builder, predRec.getValueAsDef("baseType"));
180180

181181
if (predRec.getName() == "AnyType") {
182-
auto op = builder.create<irdl::AnyOp>(UnknownLoc::get(ctx));
182+
auto op = irdl::AnyOp::create(builder, UnknownLoc::get(ctx));
183183
return op.getOutput();
184184
}
185185

@@ -190,12 +190,12 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
190190
SmallVector<FlatSymbolRefAttr> nested = {
191191
SymbolRefAttr::get(ctx, combined)};
192192
auto typeSymbol = SymbolRefAttr::get(ctx, dialect, nested);
193-
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx), typeSymbol);
193+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx), typeSymbol);
194194
return op.getOutput();
195195
}
196196
std::string typeName = ("!" + predRec.getValueAsString("typeName")).str();
197-
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
198-
StringAttr::get(ctx, typeName));
197+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
198+
StringAttr::get(ctx, typeName));
199199
return op.getOutput();
200200
}
201201

@@ -205,7 +205,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
205205
constraints.push_back(
206206
createTypeConstraint(builder, tblgen::Constraint(child)));
207207
}
208-
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
208+
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
209209
return op.getOutput();
210210
}
211211

@@ -215,14 +215,14 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
215215
constraints.push_back(
216216
createTypeConstraint(builder, tblgen::Constraint(child)));
217217
}
218-
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
218+
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
219219
return op.getOutput();
220220
}
221221

222222
// Integer types
223223
if (predRec.getName() == "AnyInteger") {
224-
auto op = builder.create<irdl::BaseOp>(
225-
UnknownLoc::get(ctx), StringAttr::get(ctx, "!builtin.integer"));
224+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
225+
StringAttr::get(ctx, "!builtin.integer"));
226226
return op.getOutput();
227227
}
228228

@@ -235,7 +235,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
235235
IntegerType::get(ctx, width, IntegerType::Signed)),
236236
typeToConstraint(builder,
237237
IntegerType::get(ctx, width, IntegerType::Unsigned))};
238-
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), types);
238+
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), types);
239239
return op.getOutput();
240240
}
241241

@@ -253,7 +253,7 @@ Value createTypeConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
253253
for (const Record *child : predRec.getValueAsListOfDefs("predicateList")) {
254254
constraints.push_back(createPredicate(builder, tblgen::Pred(child)));
255255
}
256-
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
256+
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
257257
return op.getOutput();
258258
}
259259

@@ -279,7 +279,7 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
279279
constraints.push_back(createPredicate(
280280
builder, tblgen::Pred(child->getValueAsDef("predicate"))));
281281
}
282-
auto op = builder.create<irdl::AllOfOp>(UnknownLoc::get(ctx), constraints);
282+
auto op = irdl::AllOfOp::create(builder, UnknownLoc::get(ctx), constraints);
283283
return op.getOutput();
284284
}
285285

@@ -290,12 +290,12 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
290290
constraints.push_back(
291291
createAttrConstraint(builder, tblgen::Constraint(child)));
292292
}
293-
auto op = builder.create<irdl::AnyOfOp>(UnknownLoc::get(ctx), constraints);
293+
auto op = irdl::AnyOfOp::create(builder, UnknownLoc::get(ctx), constraints);
294294
return op.getOutput();
295295
}
296296

297297
if (predRec.getName() == "AnyAttr") {
298-
auto op = builder.create<irdl::AnyOp>(UnknownLoc::get(ctx));
298+
auto op = irdl::AnyOp::create(builder, UnknownLoc::get(ctx));
299299
return op.getOutput();
300300
}
301301

@@ -317,7 +317,7 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
317317

318318
if (predRec.getName() == "UnitAttr") {
319319
auto op =
320-
builder.create<irdl::IsOp>(UnknownLoc::get(ctx), UnitAttr::get(ctx));
320+
irdl::IsOp::create(builder, UnknownLoc::get(ctx), UnitAttr::get(ctx));
321321
return op.getOutput();
322322
}
323323

@@ -329,12 +329,12 @@ Value createAttrConstraint(OpBuilder &builder, tblgen::Constraint constraint) {
329329

330330
};
331331
auto typeSymbol = SymbolRefAttr::get(ctx, dialect, nested);
332-
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx), typeSymbol);
332+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx), typeSymbol);
333333
return op.getOutput();
334334
}
335335
std::string typeName = ("#" + predRec.getValueAsString("attrName")).str();
336-
auto op = builder.create<irdl::BaseOp>(UnknownLoc::get(ctx),
337-
StringAttr::get(ctx, typeName));
336+
auto op = irdl::BaseOp::create(builder, UnknownLoc::get(ctx),
337+
StringAttr::get(ctx, typeName));
338338
return op.getOutput();
339339
}
340340

@@ -348,15 +348,15 @@ Value createRegionConstraint(OpBuilder &builder, tblgen::Region constraint) {
348348
if (predRec.getName() == "AnyRegion") {
349349
ValueRange entryBlockArgs = {};
350350
auto op =
351-
builder.create<irdl::RegionOp>(UnknownLoc::get(ctx), entryBlockArgs);
351+
irdl::RegionOp::create(builder, UnknownLoc::get(ctx), entryBlockArgs);
352352
return op.getResult();
353353
}
354354

355355
if (predRec.isSubClassOf("SizedRegion")) {
356356
ValueRange entryBlockArgs = {};
357357
auto ty = IntegerType::get(ctx, 32);
358-
auto op = builder.create<irdl::RegionOp>(
359-
UnknownLoc::get(ctx), entryBlockArgs,
358+
auto op = irdl::RegionOp::create(
359+
builder, UnknownLoc::get(ctx), entryBlockArgs,
360360
IntegerAttr::get(ty, predRec.getValueAsInt("blocks")));
361361
return op.getResult();
362362
}
@@ -388,8 +388,8 @@ irdl::OperationOp createIRDLOperation(OpBuilder &builder,
388388
MLIRContext *ctx = builder.getContext();
389389
StringRef opName = getOperatorName(tblgenOp);
390390

391-
irdl::OperationOp op = builder.create<irdl::OperationOp>(
392-
UnknownLoc::get(ctx), StringAttr::get(ctx, opName));
391+
irdl::OperationOp op = irdl::OperationOp::create(
392+
builder, UnknownLoc::get(ctx), StringAttr::get(ctx, opName));
393393

394394
// Add the block in the region.
395395
Block &opBlock = op.getBody().emplaceBlock();
@@ -471,19 +471,19 @@ irdl::OperationOp createIRDLOperation(OpBuilder &builder,
471471

472472
// Create the operands and results operations.
473473
if (!operands.empty())
474-
consBuilder.create<irdl::OperandsOp>(UnknownLoc::get(ctx), operands,
475-
ArrayAttr::get(ctx, operandNames),
476-
operandVariadicity);
474+
irdl::OperandsOp::create(consBuilder, UnknownLoc::get(ctx), operands,
475+
ArrayAttr::get(ctx, operandNames),
476+
operandVariadicity);
477477
if (!results.empty())
478-
consBuilder.create<irdl::ResultsOp>(UnknownLoc::get(ctx), results,
479-
ArrayAttr::get(ctx, resultNames),
480-
resultVariadicity);
478+
irdl::ResultsOp::create(consBuilder, UnknownLoc::get(ctx), results,
479+
ArrayAttr::get(ctx, resultNames),
480+
resultVariadicity);
481481
if (!attributes.empty())
482-
consBuilder.create<irdl::AttributesOp>(UnknownLoc::get(ctx), attributes,
483-
ArrayAttr::get(ctx, attrNames));
482+
irdl::AttributesOp::create(consBuilder, UnknownLoc::get(ctx), attributes,
483+
ArrayAttr::get(ctx, attrNames));
484484
if (!regions.empty())
485-
consBuilder.create<irdl::RegionsOp>(UnknownLoc::get(ctx), regions,
486-
ArrayAttr::get(ctx, regionNames));
485+
irdl::RegionsOp::create(consBuilder, UnknownLoc::get(ctx), regions,
486+
ArrayAttr::get(ctx, regionNames));
487487

488488
return op;
489489
}
@@ -493,8 +493,8 @@ irdl::TypeOp createIRDLType(OpBuilder &builder, tblgen::TypeDef &tblgenType) {
493493
StringRef typeName = getTypeName(tblgenType);
494494
std::string combined = ("!" + typeName).str();
495495

496-
irdl::TypeOp op = builder.create<irdl::TypeOp>(
497-
UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
496+
irdl::TypeOp op = irdl::TypeOp::create(builder, UnknownLoc::get(ctx),
497+
StringAttr::get(ctx, combined));
498498

499499
op.getBody().emplaceBlock();
500500

@@ -507,8 +507,8 @@ irdl::AttributeOp createIRDLAttr(OpBuilder &builder,
507507
StringRef attrName = getAttrName(tblgenAttr);
508508
std::string combined = ("#" + attrName).str();
509509

510-
irdl::AttributeOp op = builder.create<irdl::AttributeOp>(
511-
UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
510+
irdl::AttributeOp op = irdl::AttributeOp::create(
511+
builder, UnknownLoc::get(ctx), StringAttr::get(ctx, combined));
512512

513513
op.getBody().emplaceBlock();
514514

@@ -517,8 +517,8 @@ irdl::AttributeOp createIRDLAttr(OpBuilder &builder,
517517

518518
static irdl::DialectOp createIRDLDialect(OpBuilder &builder) {
519519
MLIRContext *ctx = builder.getContext();
520-
return builder.create<irdl::DialectOp>(UnknownLoc::get(ctx),
521-
StringAttr::get(ctx, selectedDialect));
520+
return irdl::DialectOp::create(builder, UnknownLoc::get(ctx),
521+
StringAttr::get(ctx, selectedDialect));
522522
}
523523

524524
static bool emitDialectIRDLDefs(const RecordKeeper &records, raw_ostream &os) {
@@ -529,7 +529,7 @@ static bool emitDialectIRDLDefs(const RecordKeeper &records, raw_ostream &os) {
529529

530530
// Create a module op and set it as the insertion point.
531531
OwningOpRef<ModuleOp> module =
532-
builder.create<ModuleOp>(UnknownLoc::get(&ctx));
532+
ModuleOp::create(builder, UnknownLoc::get(&ctx));
533533
builder = builder.atBlockBegin(module->getBody());
534534
// Create the dialect and insert it.
535535
irdl::DialectOp dialect = createIRDLDialect(builder);

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