@@ -1143,16 +1143,6 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
1143
1143
if (MI.getNumDefs () != 1 )
1144
1144
return false ;
1145
1145
1146
- unsigned VLOpNum = RISCVII::getVLOpNum (Desc);
1147
- const MachineOperand &VLOp = MI.getOperand (VLOpNum);
1148
-
1149
- // If the VL is 1, then there is no need to reduce it. This is an
1150
- // optimization, not needed to preserve correctness.
1151
- if (VLOp.isImm () && VLOp.getImm () == 1 ) {
1152
- LLVM_DEBUG (dbgs () << " Not a candidate because VL is already 1\n " );
1153
- return false ;
1154
- }
1155
-
1156
1146
if (MI.mayRaiseFPException ()) {
1157
1147
LLVM_DEBUG (dbgs () << " Not a candidate because may raise FP exception\n " );
1158
1148
return false ;
@@ -1285,16 +1275,23 @@ std::optional<MachineOperand> RISCVVLOptimizer::checkUsers(MachineInstr &MI) {
1285
1275
bool RISCVVLOptimizer::tryReduceVL (MachineInstr &MI) {
1286
1276
LLVM_DEBUG (dbgs () << " Trying to reduce VL for " << MI << " \n " );
1287
1277
1278
+ unsigned VLOpNum = RISCVII::getVLOpNum (MI.getDesc ());
1279
+ MachineOperand &VLOp = MI.getOperand (VLOpNum);
1280
+
1281
+ // If the VL is 1, then there is no need to reduce it. This is an
1282
+ // optimization, not needed to preserve correctness.
1283
+ if (VLOp.isImm () && VLOp.getImm () == 1 ) {
1284
+ LLVM_DEBUG (dbgs () << " Abort due to VL == 1, no point in reducing.\n " );
1285
+ return false ;
1286
+ }
1287
+
1288
1288
auto CommonVL = checkUsers (MI);
1289
1289
if (!CommonVL)
1290
1290
return false ;
1291
1291
1292
1292
assert ((CommonVL->isImm () || CommonVL->getReg ().isVirtual ()) &&
1293
1293
" Expected VL to be an Imm or virtual Reg" );
1294
1294
1295
- unsigned VLOpNum = RISCVII::getVLOpNum (MI.getDesc ());
1296
- MachineOperand &VLOp = MI.getOperand (VLOpNum);
1297
-
1298
1295
if (!RISCV::isVLKnownLE (*CommonVL, VLOp)) {
1299
1296
LLVM_DEBUG (dbgs () << " Abort due to CommonVL not <= VLOp.\n " );
1300
1297
return false ;
@@ -1345,6 +1342,8 @@ bool RISCVVLOptimizer::runOnMachineFunction(MachineFunction &MF) {
1345
1342
continue ;
1346
1343
1347
1344
MachineInstr *DefMI = MRI->getVRegDef (Op.getReg ());
1345
+ if (!isCandidate (*DefMI))
1346
+ continue ;
1348
1347
1349
1348
if (IgnoreSameBlock && DefMI->getParent () == MI.getParent ())
1350
1349
continue ;
@@ -1376,8 +1375,7 @@ bool RISCVVLOptimizer::runOnMachineFunction(MachineFunction &MF) {
1376
1375
while (!Worklist.empty ()) {
1377
1376
assert (MadeChange);
1378
1377
MachineInstr &MI = *Worklist.pop_back_val ();
1379
- if (!isCandidate (MI))
1380
- continue ;
1378
+ assert (isCandidate (MI));
1381
1379
if (!tryReduceVL (MI))
1382
1380
continue ;
1383
1381
PushOperands (MI, /* IgnoreSameBlock*/ false );
0 commit comments