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[X86][MC] Check AdSize16 for 16-bit addressing #99761

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Jul 20, 2024
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5 changes: 4 additions & 1 deletion llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -691,9 +691,12 @@ void X86MCCodeEmitter::emitMemModRMByte(

unsigned BaseRegNo = BaseReg ? getX86RegNum(Base) : -1U;

bool IsAdSize16 = STI.hasFeature(X86::Is32Bit) &&
(TSFlags & X86II::AdSizeMask) == X86II::AdSize16;

// 16-bit addressing forms of the ModR/M byte have a different encoding for
// the R/M field and are far more limited in which registers can be used.
if (X86_MC::is16BitMemOperand(MI, Op, STI)) {
if (IsAdSize16 || X86_MC::is16BitMemOperand(MI, Op, STI)) {
if (BaseReg) {
// For 32-bit addressing, the row and column values in Table 2-2 are
// basically the same. It's AX/CX/DX/BX/SP/BP/SI/DI in that order, with
Expand Down
10 changes: 9 additions & 1 deletion llvm/test/MC/X86/x86-32-coverage.s
Original file line number Diff line number Diff line change
Expand Up @@ -10790,7 +10790,7 @@ btcl $4, (%eax)
movdir64b 485498096, %ecx

// CHECK: movdir64b 485498096, %cx
// CHECK: # encoding: [0x67,0x66,0x0f,0x38,0xf8,0x0d,0xf0,0x1c,0xf0,0x1c]
// CHECK: # encoding: [0x67,0x66,0x0f,0x38,0xf8,0x0e,0xf0,0x1c]
movdir64b 485498096, %cx

// CHECK: movdir64b (%edx), %eax
Expand Down Expand Up @@ -10877,6 +10877,10 @@ enqcmd (%bx,%di), %di
// CHECK: encoding: [0x67,0xf2,0x0f,0x38,0xf8,0x81,0xc0,0x1f]
enqcmd 8128(%bx,%di), %ax

// CHECK: enqcmd 485498096, %cx
// CHECK: encoding: [0x67,0xf2,0x0f,0x38,0xf8,0x0e,0xf0,0x1c]
enqcmd 485498096, %cx

// CHECK: enqcmds (%bx,%di), %di
// CHECK: encoding: [0x67,0xf3,0x0f,0x38,0xf8,0x39]
enqcmds (%bx,%di), %di
Expand All @@ -10885,6 +10889,10 @@ enqcmds (%bx,%di), %di
// CHECK: encoding: [0x67,0xf3,0x0f,0x38,0xf8,0x81,0xc0,0x1f]
enqcmds 8128(%bx,%di), %ax

// CHECK: enqcmds 485498096, %cx
// CHECK: encoding: [0x67,0xf3,0x0f,0x38,0xf8,0x0e,0xf0,0x1c]
enqcmds 485498096, %cx

// CHECK: serialize
// CHECK: encoding: [0x0f,0x01,0xe8]
serialize
Expand Down
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