Skip to content

Fix i1 array global crash in NVPTXAsmPrinter. #92506

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
May 17, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 5 additions & 1 deletion llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1847,9 +1847,13 @@ void NVPTXAsmPrinter::bufferLEByte(const Constant *CPV, int Bytes,
auto AddIntToBuffer = [AggBuffer, Bytes](const APInt &Val) {
size_t NumBytes = (Val.getBitWidth() + 7) / 8;
SmallVector<unsigned char, 16> Buf(NumBytes);
for (unsigned I = 0; I < NumBytes; ++I) {
for (unsigned I = 0; I < NumBytes - 1; ++I) {
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This could certainly use a comment or two about what's going on, because it's not obvious. At all.

Why exactly are we special casing the last byte?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It's explained in the PR description, also look at the test. If the type's bitwidth is not a multiple of 8, the old code crashes.

Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

PR description only shows the expression for the failed assertion: bitPosition < BitWidth && (numBits + bitPosition) <= BitWidth, but it was not clear which part of that assertion has failed.

The substance of the fix LGTM.

That said, If I ever need to look at this code in the future, I'm pretty sure I'll have to scratch my head, again, pondering what's going on here. Hence, my suggestion that a comment would be helpful. We already have way too many puzzles, we do not need more.

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Sounds good. Sent a follow-up.

Buf[I] = Val.extractBitsAsZExtValue(8, I * 8);
}
size_t LastBytePosition = (NumBytes - 1) * 8;
size_t LastByteBits = Val.getBitWidth() - LastBytePosition;
Buf[NumBytes - 1] =
Val.extractBitsAsZExtValue(LastByteBits, LastBytePosition);
AggBuffer->addBytes(Buf.data(), NumBytes, Bytes);
};

Expand Down
19 changes: 19 additions & 0 deletions llvm/test/CodeGen/NVPTX/i1-array-global.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_20 | %ptxas-verify %}

target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
target triple = "nvptx-nvidia-cuda"

@global_cst = private constant [6 x i1] [i1 true, i1 false, i1 true, i1 false, i1 true, i1 false]

; CHECK: .global .align 1 .b8 global_cst[6] = {1, 0, 1, 0, 1}
define void @kernel(i32 %i, ptr %out) {
%5 = getelementptr inbounds i1, ptr @global_cst, i32 %i
%6 = load i1, ptr %5, align 1
store i1 %6, ptr %out, align 1
ret void
}

!nvvm.annotations = !{!0}
!0 = !{ptr @kernel, !"kernel", i32 1}

Loading