[InstCombine] Simplify zext nneg i1 X to zero

[dtcxzyw]

Alive2: https://alive2.llvm.org/ce/z/Wm6kCk

It is not suitable to implement this in InstSimplify because nneg flag is dropped :(

llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp

Lines 7116 to 7120 in 0be9592

	#define HANDLE_CAST_INST(num, opc, clas) case Instruction::opc:
	#include "llvm/IR/Instruction.def"
	#undef HANDLE_CAST_INST
	return simplifyCastInst(I->getOpcode(), NewOps[0], I->getType(), Q,
	MaxRecurse);

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: Yingwei Zheng (dtcxzyw)

Changes

Alive2: https://alive2.llvm.org/ce/z/Wm6kCk

It is not suitable to implement this in InstSimplify because nneg flag is dropped :(

llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp

Lines 7116 to 7120 in 0be9592

	#define HANDLE_CAST_INST(num, opc, clas) case Instruction::opc:
	#include "llvm/IR/Instruction.def"
	#undef HANDLE_CAST_INST
	return simplifyCastInst(I->getOpcode(), NewOps[0], I->getType(), Q,
	MaxRecurse);

---

Full diff: https://github.com/llvm/llvm-project/pull/85043.diff

2 Files Affected:

• (modified) llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp (+4)
• (modified) llvm/test/Transforms/InstCombine/zext.ll (+31)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 45afa6363ae01f..a9817f1af8c1ac 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -1121,6 +1121,10 @@ Instruction *InstCombinerImpl::visitZExt(ZExtInst &Zext) {
   Value *Src = Zext.getOperand(0);
   Type *SrcTy = Src->getType(), *DestTy = Zext.getType();
 
+  // zext nneg bool x -> 0
+  if (SrcTy->isIntOrIntVectorTy(1) && Zext.hasNonNeg())
+    return replaceInstUsesWith(Zext, Constant::getNullValue(Zext.getType()));
+
   // Try to extend the entire expression tree to the wide destination type.
   unsigned BitsToClear;
   if (shouldChangeType(SrcTy, DestTy) &&
diff --git a/llvm/test/Transforms/InstCombine/zext.ll b/llvm/test/Transforms/InstCombine/zext.ll
index edbd4850fb1190..88cd9c70af40d8 100644
--- a/llvm/test/Transforms/InstCombine/zext.ll
+++ b/llvm/test/Transforms/InstCombine/zext.ll
@@ -836,3 +836,34 @@ define i64 @zext_nneg_demanded_constant(i8 %a) nounwind {
   %c = and i64 %b, 254
   ret i64 %c
 }
+
+define i32 @zext_nneg_i1(i1 %x) {
+; CHECK-LABEL: @zext_nneg_i1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    ret i32 0
+;
+entry:
+  %res = zext nneg i1 %x to i32
+  ret i32 %res
+}
+
+define <2 x i32> @zext_nneg_i1_vec(<2 x i1> %x) {
+; CHECK-LABEL: @zext_nneg_i1_vec(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    ret <2 x i32> zeroinitializer
+;
+entry:
+  %res = zext nneg <2 x i1> %x to <2 x i32>
+  ret <2 x i32> %res
+}
+
+define i32 @zext_nneg_i2(i2 %x) {
+; CHECK-LABEL: @zext_nneg_i2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[RES:%.*]] = zext nneg i2 [[X:%.*]] to i32
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+entry:
+  %res = zext nneg i2 %x to i32
+  ret i32 %res
+}

[nikic]

LGTM