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[AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) #65757

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Merged
merged 1 commit into from
Sep 8, 2023
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[AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) #65757

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5 changes: 5 additions & 0 deletions llvm/include/llvm/IR/IntrinsicsAMDGPU.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1677,6 +1677,11 @@ def int_amdgcn_s_sleep :
IntrHasSideEffects]> {
}

def int_amdgcn_s_nop :
DefaultAttrsIntrinsic<[], [llvm_i16_ty], [ImmArg<ArgIndex<0>>, IntrNoMem,
IntrHasSideEffects]> {
}

def int_amdgcn_s_incperflevel :
ClangBuiltin<"__builtin_amdgcn_s_incperflevel">,
DefaultAttrsIntrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem,
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3 changes: 2 additions & 1 deletion llvm/lib/Target/AMDGPU/SOPInstructions.td
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Expand Up @@ -1161,7 +1161,8 @@ multiclass SOPP_With_Relaxation <string opName, dag ins,
def _pad_s_nop : SOPP_Pseudo <opName # "_pad_s_nop", ins, asmOps, pattern, " ", opName>;
}

def S_NOP : SOPP_Pseudo<"s_nop" , (ins i16imm:$simm16), "$simm16"> {
def S_NOP : SOPP_Pseudo<"s_nop" , (ins i16imm:$simm16), "$simm16",
[(int_amdgcn_s_nop timm:$simm16)]> {
let hasSideEffects = 1;
}

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30 changes: 30 additions & 0 deletions llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.nop.ll
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@@ -0,0 +1,30 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s

define amdgpu_kernel void @test_s_nop() {
; GCN-LABEL: test_s_nop:
; GCN: ; %bb.0:
; GCN-NEXT: s_nop 0
; GCN-NEXT: s_nop 1
; GCN-NEXT: s_nop 2
; GCN-NEXT: s_nop 3
; GCN-NEXT: s_nop 4
; GCN-NEXT: s_nop 5
; GCN-NEXT: s_nop 6
; GCN-NEXT: s_nop 7
; GCN-NEXT: s_nop 63
; GCN-NEXT: s_endpgm
call void @llvm.amdgcn.s.nop(i16 0)
call void @llvm.amdgcn.s.nop(i16 1)
call void @llvm.amdgcn.s.nop(i16 2)
call void @llvm.amdgcn.s.nop(i16 3)
call void @llvm.amdgcn.s.nop(i16 4)
call void @llvm.amdgcn.s.nop(i16 5)
call void @llvm.amdgcn.s.nop(i16 6)
call void @llvm.amdgcn.s.nop(i16 7)
call void @llvm.amdgcn.s.nop(i16 63)
ret void
}

declare void @llvm.amdgcn.s.nop(i16)