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[X86] combineConcatVectorOps - convert PSHUFB/PSADBW/VPMADDUBSW/VPMADDUBSW concatenation to use combineConcatVectorOps recursion #130592

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Merged
merged 2 commits into from
Mar 10, 2025
Merged

[X86] combineConcatVectorOps - convert PSHUFB/PSADBW/VPMADDUBSW/VPMADDUBSW concatenation to use combineConcatVectorOps recursion #130592

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527ab9f
[X86] combineConcatVectorOps - convert PSHUFB/PSADBW/VPMADDUBSW/VPMAD…
RKSimon Mar 10, 2025
51f2d21
Merge branch 'upstream' into x86-concat-pshufb-madd-sad
RKSimon Mar 10, 2025
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10 changes: 7 additions & 3 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Expand Up @@ -58095,9 +58095,13 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
MVT SrcVT = Op0.getOperand(0).getSimpleValueType();
SrcVT = MVT::getVectorVT(SrcVT.getScalarType(),
NumOps * SrcVT.getVectorNumElements());
return DAG.getNode(Op0.getOpcode(), DL, VT,
ConcatSubOperand(SrcVT, Ops, 0),
ConcatSubOperand(SrcVT, Ops, 1));
SDValue Concat0 = CombineSubOperand(SrcVT, Ops, 0);
SDValue Concat1 = CombineSubOperand(SrcVT, Ops, 1);
if (Concat0 || Concat1)
return DAG.getNode(
Op0.getOpcode(), DL, VT,
Concat0 ? Concat0 : ConcatSubOperand(SrcVT, Ops, 0),
Concat1 ? Concat1 : ConcatSubOperand(SrcVT, Ops, 1));
}
break;
case X86ISD::VPERMV:
Expand Down
18 changes: 7 additions & 11 deletions llvm/test/CodeGen/X86/combine-pmadd.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -51,11 +51,9 @@ define <8 x i32> @combine_pmaddwd_concat(<8 x i16> %a0, <8 x i16> %a1, <8 x i16>
;
; AVX2-LABEL: combine_pmaddwd_concat:
; AVX2: # %bb.0:
; AVX2-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmaddwd %xmm3, %xmm2, %xmm1
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%1 = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1)
%2 = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a2, <8 x i16> %a3)
Expand Down Expand Up @@ -209,7 +207,7 @@ define <16 x i16> @combine_pmaddubsw_concat(<32 x i8> %a0, <32 x i8> %a1) {
ret <16 x i16> %res
}

; TODO: Not beneficial to concatenate both inputs just to create a 256-bit pmaddubsw
; Not beneficial to concatenate both inputs just to create a 256-bit pmaddubsw
define <16 x i16> @combine_pmaddubsw_concat_unecessary(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2, <16 x i8> %a3) {
; SSE-LABEL: combine_pmaddubsw_concat_unecessary:
; SSE: # %bb.0:
Expand All @@ -227,11 +225,9 @@ define <16 x i16> @combine_pmaddubsw_concat_unecessary(<16 x i8> %a0, <16 x i8>
;
; AVX2-LABEL: combine_pmaddubsw_concat_unecessary:
; AVX2: # %bb.0:
; AVX2-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpmaddubsw %xmm3, %xmm2, %xmm1
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%1 = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1)
%2 = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a2, <16 x i8> %a3)
Expand Down
10 changes: 4 additions & 6 deletions llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
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Expand Up @@ -806,15 +806,13 @@ define <32 x i8> @concat_packsr_unnecessary(<8 x i16> %a0, <8 x i16> %a1, <8 x i
}
declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>)

; TODO: Not beneficial to concatenate both inputs just to create a 256-bit pshufb
; Not beneficial to concatenate both inputs just to create a 256-bit pshufb
define <32 x i8> @concat_pshufb_unnecessary(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) nounwind {
; CHECK-LABEL: concat_pshufb_unnecessary:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; CHECK-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; CHECK-NEXT: vpshufb %ymm1, %ymm0, %ymm0
; CHECK-NEXT: vpshufb %xmm1, %xmm0, %xmm1
; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
; CHECK-NEXT: ret{{[l|q]}}
%lo = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1)
%hi = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a2)
Expand Down
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