[RISCV][Clang] Add RequiredFeatures to zvfh intrinsics #115436
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This is a follow-up patch for llvm#101811. That we can remove the type checking for fp16 from SemaRISCV.cpp. Also fixes: llvm#94306
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@llvm/pr-subscribers-clang @llvm/pr-subscribers-backend-risc-v Author: Jim Lin (tclin914) ChangesThis is a follow-up patch for Also fixes: #94306 Patch is 31.87 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/115436.diff 3 Files Affected:
diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td
index 74b9a7fc753a62..c4d2afe407516c 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -1651,9 +1651,13 @@ let ManualCodegen = [{
// 13.5. Vector Widening Floating-Point Multiply
let Log2LMUL = [-2, -1, 0, 1, 2] in {
- defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "xf",
- [["vv", "w", "wvvu"],
+ defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "f",
+ [["vv", "w", "wvvu"],
["vf", "w", "wveu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "x",
+ [["vv", "w", "wvvu"],
+ ["vf", "w", "wveu"]]>;
}
}
// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
@@ -1663,9 +1667,13 @@ let ManualCodegen = [{
// 13.5. Vector Widening Floating-Point Multiply
let Log2LMUL = [-2, -1, 0, 1, 2] in {
- defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "xf",
- [["vv", "w", "wvv"],
+ defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "f",
+ [["vv", "w", "wvv"],
["vf", "w", "wve"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfwmul : RVVOutOp0Op1BuiltinSet<"vfwmul", "x",
+ [["vv", "w", "wvv"],
+ ["vf", "w", "wve"]]>;
}
}
}
@@ -1846,20 +1854,30 @@ let ManualCodegen = [{
}] in {
let HasFRMRoundModeOp = 1 in {
// 13.8. Vector Floating-Point Square-Root Instruction
- defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "xfd", [["v", "v", "vvu"]]>;
+ defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "fd", [["v", "v", "vvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "x", [["v", "v", "vvu"]]>;
// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
- defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "xfd", [["v", "v", "vvu"]]>;
+ defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "fd", [["v", "v", "vvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "x", [["v", "v", "vvu"]]>;
}
// 13.8. Vector Floating-Point Square-Root Instruction
- defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "xfd", [["v", "v", "vv"]]>;
+ defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "fd", [["v", "v", "vv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfsqrt : RVVOutBuiltinSet<"vfsqrt", "x", [["v", "v", "vv"]]>;
// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
- defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "xfd", [["v", "v", "vv"]]>;
+ defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "fd", [["v", "v", "vv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfrec7 : RVVOutBuiltinSet<"vfrec7", "x", [["v", "v", "vv"]]>;
}
// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
-defm vfrsqrt7 : RVVOutBuiltinSet<"vfrsqrt7", "xfd", [["v", "v", "vv"]]>;
+defm vfrsqrt7 : RVVOutBuiltinSet<"vfrsqrt7", "fd", [["v", "v", "vv"]]>;
+let RequiredFeatures = ["Zvfh"] in
+ defm vfrsqrt7 : RVVOutBuiltinSet<"vfrsqrt7", "x", [["v", "v", "vv"]]>;
// 13.11. Vector Floating-Point MIN/MAX Instructions
defm vfmin : RVVFloatingBinBuiltinSet;
@@ -1870,8 +1888,12 @@ defm vfsgnj : RVVFloatingBinBuiltinSet;
defm vfsgnjn : RVVFloatingBinBuiltinSet;
defm vfsgnjx : RVVFloatingBinBuiltinSet;
}
-defm vfneg_v : RVVPseudoVFUnaryBuiltin<"vfsgnjn", "xfd">;
-defm vfabs_v : RVVPseudoVFUnaryBuiltin<"vfsgnjx", "xfd">;
+defm vfneg_v : RVVPseudoVFUnaryBuiltin<"vfsgnjn", "fd">;
+let RequiredFeatures = ["Zvfh"] in
+ defm vfneg_v : RVVPseudoVFUnaryBuiltin<"vfsgnjn", "x">;
+defm vfabs_v : RVVPseudoVFUnaryBuiltin<"vfsgnjx", "fd">;
+let RequiredFeatures = ["Zvfh"] in
+ defm vfabs_v : RVVPseudoVFUnaryBuiltin<"vfsgnjx", "x">;
// 13.13. Vector Floating-Point Compare Instructions
let MaskedPolicyScheme = HasPassthruOperand,
@@ -1885,8 +1907,11 @@ defm vmfge : RVVFloatingMaskOutBuiltinSet;
}
// 13.14. Vector Floating-Point Classify Instruction
-let Name = "vfclass_v", UnMaskedPolicyScheme = HasPassthruOperand in
- def vfclass : RVVOp0Builtin<"Uv", "Uvv", "xfd">;
+let UnMaskedPolicyScheme = HasPassthruOperand in {
+defm vfclass : RVVOp0BuiltinSet<"vfclass", "fd", [["v", "Uv", "Uvv"]]>;
+let RequiredFeatures = ["Zvfh"] in
+ defm vfclass : RVVOp0BuiltinSet<"vfclass", "x", [["v", "Uv", "Uvv"]]>;
+}
// 13.15. Vector Floating-Point Merge Instruction
// C/C++ Operand: (mask, op1, op2, vl), Builtin: (op1, op2, mask, vl)
@@ -1907,8 +1932,11 @@ let HasMasked = false,
let RequiredFeatures = ["Zvfbfmin"] in
defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "y",
[["vvm", "v", "vvvm"]]>;
- defm vfmerge : RVVOutOp1BuiltinSet<"vfmerge", "xfd",
+ defm vfmerge : RVVOutOp1BuiltinSet<"vfmerge", "fd",
[["vfm", "v", "vvem"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfmerge : RVVOutOp1BuiltinSet<"vfmerge", "x",
+ [["vfm", "v", "vvem"]]>;
}
// 13.16. Vector Floating-Point Move Instruction
@@ -1916,55 +1944,71 @@ let HasMasked = false,
UnMaskedPolicyScheme = HasPassthruOperand,
SupportOverloading = false,
MaskedPolicyScheme = NonePolicy,
- OverloadedName = "vfmv_v" in
- defm vfmv_v : RVVOutBuiltinSet<"vfmv_v_f", "xfd",
- [["f", "v", "ve"]]>;
+ OverloadedName = "vfmv_v" in {
+ defm vfmv_v : RVVOutBuiltinSet<"vfmv_v_f", "fd",
+ [["f", "v", "ve"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfmv_v : RVVOutBuiltinSet<"vfmv_v_f", "x",
+ [["f", "v", "ve"]]>;
+}
// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
let UnMaskedPolicyScheme = HasPassthruOperand in {
-def vfcvt_rtz_xu_f_v : RVVConvToUnsignedBuiltin<"vfcvt_rtz_xu">;
-def vfcvt_rtz_x_f_v : RVVConvToSignedBuiltin<"vfcvt_rtz_x">;
+let OverloadedName = "vfcvt_rtz_xu" in {
+ defm : RVVConvBuiltinSet<"vfcvt_rtz_xu_f_v", "fd", [["Uv", "Uvv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_rtz_xu_f_v", "x", [["Uv", "Uvv"]]>;
+}
+let OverloadedName = "vfcvt_rtz_x" in {
+ defm : RVVConvBuiltinSet<"vfcvt_rtz_x_f_v", "fd", [["Iv", "Ivv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_rtz_x_f_v", "x", [["Iv", "Ivv"]]>;
+}
// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- def vfwcvt_rtz_xu_f_v : RVVConvToWidenUnsignedBuiltin<"vfwcvt_rtz_xu">;
- def vfwcvt_rtz_x_f_v : RVVConvToWidenSignedBuiltin<"vfwcvt_rtz_x">;
- def vfwcvt_f_xu_v : RVVConvBuiltin<"Fw", "FwUv", "si", "vfwcvt_f">;
- def vfwcvt_f_x_v : RVVConvBuiltin<"Fw", "Fwv", "si", "vfwcvt_f">;
- let RequiredFeatures = ["Zvfh"] in {
- let Name = "vfwcvt_f_xu_v",
- IRName = "vfwcvt_f_xu_v",
- MaskedIRName = "vfwcvt_f_xu_v_mask" in
- def : RVVConvBuiltin<"Fw", "FwUv", "c", "vfwcvt_f">;
- let Name = "vfwcvt_f_x_v",
- IRName = "vfwcvt_f_x_v",
- MaskedIRName = "vfwcvt_f_x_v_mask" in
- def : RVVConvBuiltin<"Fw", "Fwv", "c", "vfwcvt_f">;
- }
- def vfwcvt_f_f_v : RVVConvBuiltin<"w", "wv", "f", "vfwcvt_f">;
- let RequiredFeatures = ["Zvfhmin"] in
- def vfwcvt_f_f_v_fp16 : RVVConvBuiltin<"w", "wv", "x", "vfwcvt_f"> {
- let Name = "vfwcvt_f_f_v";
- let IRName = "vfwcvt_f_f_v";
- let MaskedIRName = "vfwcvt_f_f_v_mask";
+ let OverloadedName = "vfwcvt_rtz_xu" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_rtz_xu_f_v", "f", [["Uw", "Uwv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_rtz_xu_f_v", "x", [["Uw", "Uwv"]]>;
+ }
+ let OverloadedName = "vfwcvt_rtz_x" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_rtz_x_f_v", "f", [["Iw", "Iwv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_rtz_x_f_v", "x", [["Iw", "Iwv"]]>;
+ }
+ let OverloadedName = "vfwcvt_f" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_f_xu_v", "si", [["Fw", "FwUv"]]>;
+ defm : RVVConvBuiltinSet<"vfwcvt_f_x_v", "si", [["Fw", "Fwv"]]>;
+ let RequiredFeatures = ["Zvfh"] in {
+ defm : RVVConvBuiltinSet<"vfwcvt_f_xu_v", "c", [["Fw", "FwUv"]]>;
+ defm : RVVConvBuiltinSet<"vfwcvt_f_x_v", "c", [["Fw", "Fwv"]]>;
}
+ }
+ let OverloadedName = "vfwcvt_f" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_f_f_v", "f", [["w", "wv"]]>;
+ let RequiredFeatures = ["Zvfhmin"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_f_f_v", "x", [["w", "wv"]]>;
+ }
}
// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- def vfncvt_rtz_xu_f_w : RVVConvToNarrowingUnsignedBuiltin<"vfncvt_rtz_xu">;
- def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
- let RequiredFeatures = ["Zvfh"] in {
- let Name = "vfncvt_rtz_xu_f_w",
- IRName = "vfncvt_rtz_xu_f_w",
- MaskedIRName = "vfncvt_rtz_xu_f_w_mask" in
- def : RVVConvBuiltin<"Uv", "UvFw", "c", "vfncvt_rtz_xu">;
- let Name = "vfncvt_rtz_x_f_w",
- IRName = "vfncvt_rtz_x_f_w",
- MaskedIRName = "vfncvt_rtz_x_f_w_mask" in
- def : RVVConvBuiltin<"Iv", "IvFw", "c", "vfncvt_rtz_x">;
+ let OverloadedName = "vfncvt_rtz_xu" in {
+ defm : RVVConvBuiltinSet<"vfncvt_rtz_xu_f_w", "si", [["Uv", "UvFw"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_rtz_xu_f_w", "c", [["Uv", "UvFw"]]>;
+ }
+ let OverloadedName = "vfncvt_rtz_x" in {
+ defm : RVVConvBuiltinSet<"vfncvt_rtz_x_f_w", "si", [["Iv", "IvFw"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_rtz_x_f_w", "c", [["Iv", "IvFw"]]>;
+ }
+ let OverloadedName = "vfncvt_rod_f" in {
+ defm : RVVConvBuiltinSet<"vfncvt_rod_f_f_w", "f", [["v", "vw"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_rod_f_f_w", "x", [["v", "vw"]]>;
}
- def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
// Zvfbfmin - Vector convert BF16 to FP32
@@ -2016,54 +2060,62 @@ let ManualCodegen = [{
}] in {
let HasFRMRoundModeOp = 1 in {
// 14.17. Single-Width Floating-Point/Integer Type-Convert Instructions
- let OverloadedName = "vfcvt_x" in
- defm :
- RVVConvBuiltinSet<"vfcvt_x_f_v", "xfd", [["Iv", "Ivvu"]]>;
- let OverloadedName = "vfcvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfcvt_xu_f_v", "xfd", [["Uv", "Uvvu"]]>;
+ let OverloadedName = "vfcvt_x" in {
+ defm : RVVConvBuiltinSet<"vfcvt_x_f_v", "fd", [["Iv", "Ivvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_x_f_v", "x", [["Iv", "Ivvu"]]>;
+ }
+ let OverloadedName = "vfcvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfcvt_xu_f_v", "fd", [["Uv", "Uvvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_xu_f_v", "x", [["Uv", "Uvvu"]]>;
+ }
let OverloadedName = "vfcvt_f" in {
- defm :
- RVVConvBuiltinSet<"vfcvt_f_x_v", "xfd", [["v", "vIvu"]]>;
- defm :
- RVVConvBuiltinSet<"vfcvt_f_xu_v", "xfd", [["v", "vUvu"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_x_v", "fd", [["v", "vIvu"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_xu_v", "fd", [["v", "vUvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in {
+ defm : RVVConvBuiltinSet<"vfcvt_f_x_v", "x", [["v", "vIvu"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_xu_v", "x", [["v", "vUvu"]]>;
+ }
}
// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- let OverloadedName = "vfwcvt_x" in
- defm :
- RVVConvBuiltinSet<"vfwcvt_x_f_v", "xf", [["Iw", "Iwvu"]]>;
- let OverloadedName = "vfwcvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfwcvt_xu_f_v", "xf", [["Uw", "Uwvu"]]>;
+ let OverloadedName = "vfwcvt_x" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_x_f_v", "f", [["Iw", "Iwvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_x_f_v", "x", [["Iw", "Iwvu"]]>;
+ }
+ let OverloadedName = "vfwcvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_xu_f_v", "f", [["Uw", "Uwvu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_xu_f_v", "x", [["Uw", "Uwvu"]]>;
+ }
}
// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- let OverloadedName = "vfncvt_x" in
- defm :
- RVVConvBuiltinSet<"vfncvt_x_f_w", "si", [["Iv", "IvFwu"]]>;
- let OverloadedName = "vfncvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfncvt_xu_f_w", "si", [["Uv", "UvFwu"]]>;
- let RequiredFeatures = ["Zvfh"] in {
- let OverloadedName = "vfncvt_x" in
- defm :
- RVVConvBuiltinSet<"vfncvt_x_f_w", "c", [["Iv", "IvFwu"]]>;
- let OverloadedName = "vfncvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfncvt_xu_f_w", "c", [["Uv", "UvFwu"]]>;
+ let OverloadedName = "vfncvt_x" in {
+ defm : RVVConvBuiltinSet<"vfncvt_x_f_w", "si", [["Iv", "IvFwu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_x_f_w", "c", [["Iv", "IvFwu"]]>;
+ }
+ let OverloadedName = "vfncvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfncvt_xu_f_w", "si", [["Uv", "UvFwu"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_xu_f_w", "c", [["Uv", "UvFwu"]]>;
}
let OverloadedName = "vfncvt_f" in {
- defm :
- RVVConvBuiltinSet<"vfncvt_f_x_w", "xf", [["v", "vIwu"]]>;
- defm :
- RVVConvBuiltinSet<"vfncvt_f_xu_w", "xf", [["v", "vUwu"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_x_w", "f", [["v", "vIwu"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_xu_w", "f", [["v", "vUwu"]]>;
+ let RequiredFeatures = ["Zvfh"] in {
+ defm : RVVConvBuiltinSet<"vfncvt_f_x_w", "x", [["v", "vIwu"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_xu_w", "x", [["v", "vUwu"]]>;
+ }
}
let OverloadedName = "vfncvt_f" in {
defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "f", [["v", "vwu"]]>;
let RequiredFeatures = ["Zvfhmin"] in
- defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vwu"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vwu"]]>;
}
}
@@ -2074,54 +2126,62 @@ let ManualCodegen = [{
}
// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
- let OverloadedName = "vfcvt_x" in
- defm :
- RVVConvBuiltinSet<"vfcvt_x_f_v", "xfd", [["Iv", "Ivv"]]>;
- let OverloadedName = "vfcvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfcvt_xu_f_v", "xfd", [["Uv", "Uvv"]]>;
+ let OverloadedName = "vfcvt_x" in {
+ defm : RVVConvBuiltinSet<"vfcvt_x_f_v", "fd", [["Iv", "Ivv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_x_f_v", "x", [["Iv", "Ivv"]]>;
+ }
+ let OverloadedName = "vfcvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfcvt_xu_f_v", "fd", [["Uv", "Uvv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfcvt_xu_f_v", "x", [["Uv", "Uvv"]]>;
+ }
let OverloadedName = "vfcvt_f" in {
- defm :
- RVVConvBuiltinSet<"vfcvt_f_x_v", "xfd", [["v", "vIv"]]>;
- defm :
- RVVConvBuiltinSet<"vfcvt_f_xu_v", "xfd", [["v", "vUv"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_x_v", "fd", [["v", "vIv"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_xu_v", "fd", [["v", "vUv"]]>;
+ let RequiredFeatures = ["Zvfh"] in {
+ defm : RVVConvBuiltinSet<"vfcvt_f_x_v", "x", [["v", "vIv"]]>;
+ defm : RVVConvBuiltinSet<"vfcvt_f_xu_v", "x", [["v", "vUv"]]>;
+ }
}
// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- let OverloadedName = "vfwcvt_x" in
- defm :
- RVVConvBuiltinSet<"vfwcvt_x_f_v", "xf", [["Iw", "Iwv"]]>;
- let OverloadedName = "vfwcvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfwcvt_xu_f_v", "xf", [["Uw", "Uwv"]]>;
+ let OverloadedName = "vfwcvt_x" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_x_f_v", "f", [["Iw", "Iwv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_x_f_v", "x", [["Iw", "Iwv"]]>;
+ }
+ let OverloadedName = "vfwcvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfwcvt_xu_f_v", "f", [["Uw", "Uwv"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfwcvt_xu_f_v", "x", [["Uw", "Uwv"]]>;
+ }
}
// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
- let OverloadedName = "vfncvt_x" in
- defm :
- RVVConvBuiltinSet<"vfncvt_x_f_w", "si", [["Iv", "IvFw"]]>;
- let OverloadedName = "vfncvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfncvt_xu_f_w", "si", [["Uv", "UvFw"]]>;
- let RequiredFeatures = ["Zvfh"] in {
- let OverloadedName = "vfncvt_x" in
- defm :
- RVVConvBuiltinSet<"vfncvt_x_f_w", "c", [["Iv", "IvFw"]]>;
- let OverloadedName = "vfncvt_xu" in
- defm :
- RVVConvBuiltinSet<"vfncvt_xu_f_w", "c", [["Uv", "UvFw"]]>;
+ let OverloadedName = "vfncvt_x" in {
+ defm : RVVConvBuiltinSet<"vfncvt_x_f_w", "si", [["Iv", "IvFw"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_x_f_w", "c", [["Iv", "IvFw"]]>;
+ }
+ let OverloadedName = "vfncvt_xu" in {
+ defm : RVVConvBuiltinSet<"vfncvt_xu_f_w", "si", [["Uv", "UvFw"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm : RVVConvBuiltinSet<"vfncvt_xu_f_w", "c", [["Uv", "UvFw"]]>;
}
let OverloadedName = "vfncvt_f" in {
- defm :
- RVVConvBuiltinSet<"vfncvt_f_x_w", "xf", [["v", "vIw"]]>;
- defm :
- RVVConvBuiltinSet<"vfncvt_f_xu_w", "xf", [["v", "vUw"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_x_w", "f", [["v", "vIw"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_xu_w", "f", [["v", "vUw"]]>;
+ let RequiredFeatures = ["Zvfh"] in {
+ defm : RVVConvBuiltinSet<"vfncvt_f_x_w", "x", [["v", "vIw"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_xu_w", "x", [["v", "vUw"]]>;
+ }
}
let OverloadedName = "vfncvt_f" in {
defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "f", [["v", "vw"]]>;
let RequiredFeatures = ["Zvfhmin"] in
- defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vw"]]>;
+ defm : RVVConvBuiltinSet<"vfncvt_f_f_w", "x", [["v", "vw"]]>;
}
}
@@ -2281,15 +2341,24 @@ let HasMasked = false, MaskedPolicyScheme = NonePolicy in {
// 16.2. Floating-Point Scalar Move Instructions
let HasMasked = false, MaskedPolicyScheme = NonePolicy in {
- let HasVL = false, OverloadedName = "vfmv_f" in
- defm vfmv_f : RVVOp0BuiltinSet<"vfmv_f_s", "xfd",
+ let HasVL = false, OverloadedName = "vfmv_f" in {
+ defm vfmv_f : RVVOp0BuiltinSet<"vfmv_f_s", "fd",
+ [["s", "ve", "ev"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfmv_f : RVVOp0BuiltinSet<"vfmv_f_s", "x",
[["s", "ve", "ev"]]>;
+ }
let OverloadedName = "vfmv_s",
UnMaskedPolicyScheme = HasPassthruOperand,
- SupportOverloading = false in
- defm vfmv_s : RVVOutBuiltinSet<"vfmv_s_f", "xfd",
+ SupportOverloading = false in {
+ defm vfmv_s : RVVOutBuiltinSet<"vfmv_s_f", "fd",
+ [["f", "v", "ve"],
+ ["x", "Uv", "UvUe"]]>;
+ let RequiredFeatures = ["Zvfh"] in
+ defm vfmv_s : RVVOutBuiltinSet<"vfmv_s_f", "x",
[["f", "v", "ve"],
["x", "Uv", "UvUe"]]>;
+ }
}
// 16.3. Vector Slide Instructions
@@ -2325,7 +2394,10 @@ let RequiredFeatures = ["Zvfbfmin"] in {
defm vrgather : RVVOutBuiltinSet<"vrgather_vx", "y",
[["vx", "v", "vvz"]]>;
}
-def...
[truncated]
|
Groverkss
pushed a commit
to iree-org/llvm-project
that referenced
this pull request
Nov 15, 2024
This is a follow-up patch for llvm#101811. That we can remove the type checking for fp16 from SemaRISCV.cpp. Fixes: llvm#101621 and llvm#94306
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This is a follow-up patch for
#101811.
That we can remove the type checking for fp16 from SemaRISCV.cpp.
Fixes: #101621 and #94306