[LoongArch] Enable alias analysis by default

[heiher]

Enable use of alias analysis during code generation.

[llvmbot]

@llvm/pr-subscribers-backend-loongarch

Author: hev (heiher)

Changes

Enable use of alias analysis during code generation.

---

Full diff: https://github.com/llvm/llvm-project/pull/114980.diff

3 Files Affected:

• (modified) llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp (+7)
• (modified) llvm/lib/Target/LoongArch/LoongArchSubtarget.h (+1)
• (modified) llvm/test/CodeGen/LoongArch/merge-load-store.ll (+2-16)

diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
index 57babfc917f897..3acbe4992273a3 100644
--- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
@@ -22,8 +22,15 @@ using namespace llvm;
 #define GET_SUBTARGETINFO_CTOR
 #include "LoongArchGenSubtargetInfo.inc"
 
+static cl::opt<bool> UseAA("loongarch-use-aa", cl::init(true),
+                           cl::desc("Enable the use of AA during codegen."));
+
 void LoongArchSubtarget::anchor() {}
 
+// Enable use of alias analysis during code generation (during MI scheduling,
+// DAGCombine, etc.).
+bool LoongArchSubtarget::useAA() const { return UseAA; }
+
 LoongArchSubtarget &LoongArchSubtarget::initializeSubtargetDependencies(
     const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
     StringRef ABIName) {
diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
index a8752c8070aa66..5e12bafebb0d52 100644
--- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
+++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
@@ -105,6 +105,7 @@ class LoongArchSubtarget : public LoongArchGenSubtargetInfo {
   unsigned getMaxBytesForAlignment() const { return MaxBytesForAlignment; }
   unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }
   bool enableMachineScheduler() const override { return true; }
+  bool useAA() const override;
 };
 } // end namespace llvm
 
diff --git a/llvm/test/CodeGen/LoongArch/merge-load-store.ll b/llvm/test/CodeGen/LoongArch/merge-load-store.ll
index 2eac65ebb1488d..b45bbc95530795 100644
--- a/llvm/test/CodeGen/LoongArch/merge-load-store.ll
+++ b/llvm/test/CodeGen/LoongArch/merge-load-store.ll
@@ -27,22 +27,8 @@ define void @merge_load_store(ptr noalias nocapture noundef readonly align 1 der
 ;
 ; LA64-LABEL: merge_load_store:
 ; LA64:       # %bb.0: # %start
-; LA64-NEXT:    ld.b $a2, $a0, 0
-; LA64-NEXT:    ld.b $a3, $a0, 1
-; LA64-NEXT:    ld.b $a4, $a0, 2
-; LA64-NEXT:    ld.b $a5, $a0, 3
-; LA64-NEXT:    st.b $a2, $a1, 0
-; LA64-NEXT:    st.b $a3, $a1, 1
-; LA64-NEXT:    st.b $a4, $a1, 2
-; LA64-NEXT:    st.b $a5, $a1, 3
-; LA64-NEXT:    ld.b $a2, $a0, 4
-; LA64-NEXT:    ld.b $a3, $a0, 5
-; LA64-NEXT:    ld.b $a4, $a0, 6
-; LA64-NEXT:    ld.b $a0, $a0, 7
-; LA64-NEXT:    st.b $a2, $a1, 4
-; LA64-NEXT:    st.b $a3, $a1, 5
-; LA64-NEXT:    st.b $a4, $a1, 6
-; LA64-NEXT:    st.b $a0, $a1, 7
+; LA64-NEXT:    ld.d $a0, $a0, 0
+; LA64-NEXT:    st.d $a0, $a1, 0
 ; LA64-NEXT:    ret
 start:
   %_3 = load i8, ptr %src, align 1

[SixWeining]

LGTM

[wangleiat]

Thanks