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[X86] Add basic computeKnownBits support for X86ISD::BSR #102474

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Aug 9, 2024
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[X86] Add basic computeKnownBits support for X86ISD::BSR #102474

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6 changes: 6 additions & 0 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Expand Up @@ -37249,6 +37249,12 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Known = KnownBits::mul(Known, Known2);
break;
}
case X86ISD::BSR:
// BSR(0) is undef, but any use of BSR already accounts for non-zero inputs.
// Similar KnownBits behaviour to CTLZ_ZERO_UNDEF.
// TODO: Bound with input known bits?
Known.Zero.setBitsFrom(Log2_32(BitWidth));
break;
case X86ISD::SETCC:
Known.Zero.setBitsFrom(1);
break;
Expand Down
5 changes: 2 additions & 3 deletions llvm/test/CodeGen/X86/combine-sub.ll
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Expand Up @@ -453,13 +453,12 @@ define void @PR52032_4(ptr %p, ptr %q) {
ret void
}

; FIXME: Failure to fold add(xor(bsr(x),-32),33) -> add(or(bsr(x),-32),33) -> add(bsr(x),1)
; Fold sub(32,xor(bsr(x),31)) -> add(xor(bsr(x),-32),33) -> add(or(bsr(x),-32),33) -> add(bsr(x),1)
define i32 @PR74101(i32 %a0) {
; CHECK-LABEL: PR74101:
; CHECK: # %bb.0:
; CHECK-NEXT: bsrl %edi, %eax
; CHECK-NEXT: xorl $-32, %eax
; CHECK-NEXT: addl $33, %eax
; CHECK-NEXT: incl %eax
; CHECK-NEXT: retq
%lz = call i32 @llvm.ctlz.i32(i32 %a0, i1 true)
%add = sub nuw nsw i32 32, %lz
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/ctlo.ll
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Expand Up @@ -364,7 +364,7 @@ define i64 @ctlo_i64_undef(i64 %x) {
; X86-NOCMOV-NEXT: notl %eax
; X86-NOCMOV-NEXT: bsrl %eax, %eax
; X86-NOCMOV-NEXT: xorl $31, %eax
; X86-NOCMOV-NEXT: addl $32, %eax
; X86-NOCMOV-NEXT: orl $32, %eax
; X86-NOCMOV-NEXT: xorl %edx, %edx
; X86-NOCMOV-NEXT: retl
; X86-NOCMOV-NEXT: .LBB7_1:
Expand All @@ -383,7 +383,7 @@ define i64 @ctlo_i64_undef(i64 %x) {
; X86-CMOV-NEXT: xorl $31, %edx
; X86-CMOV-NEXT: bsrl %eax, %eax
; X86-CMOV-NEXT: xorl $31, %eax
; X86-CMOV-NEXT: addl $32, %eax
; X86-CMOV-NEXT: orl $32, %eax
; X86-CMOV-NEXT: testl %ecx, %ecx
; X86-CMOV-NEXT: cmovnel %edx, %eax
; X86-CMOV-NEXT: xorl %edx, %edx
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/ctlz.ll
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Expand Up @@ -145,7 +145,7 @@ define i64 @ctlz_i64(i64 %x) {
; X86-NOCMOV-NEXT: # %bb.2:
; X86-NOCMOV-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-NOCMOV-NEXT: xorl $31, %eax
; X86-NOCMOV-NEXT: addl $32, %eax
; X86-NOCMOV-NEXT: orl $32, %eax
; X86-NOCMOV-NEXT: xorl %edx, %edx
; X86-NOCMOV-NEXT: retl
; X86-NOCMOV-NEXT: .LBB3_1:
Expand All @@ -161,7 +161,7 @@ define i64 @ctlz_i64(i64 %x) {
; X86-CMOV-NEXT: xorl $31, %edx
; X86-CMOV-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-CMOV-NEXT: xorl $31, %eax
; X86-CMOV-NEXT: addl $32, %eax
; X86-CMOV-NEXT: orl $32, %eax
; X86-CMOV-NEXT: testl %ecx, %ecx
; X86-CMOV-NEXT: cmovnel %edx, %eax
; X86-CMOV-NEXT: xorl %edx, %edx
Expand Down Expand Up @@ -1126,7 +1126,7 @@ define i64 @ctlz_xor63_i64_true(i64 %x) {
; X86-NOCMOV-NEXT: # %bb.2:
; X86-NOCMOV-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-NOCMOV-NEXT: xorl $31, %eax
; X86-NOCMOV-NEXT: addl $32, %eax
; X86-NOCMOV-NEXT: orl $32, %eax
; X86-NOCMOV-NEXT: jmp .LBB19_3
; X86-NOCMOV-NEXT: .LBB19_1:
; X86-NOCMOV-NEXT: bsrl %eax, %eax
Expand All @@ -1143,7 +1143,7 @@ define i64 @ctlz_xor63_i64_true(i64 %x) {
; X86-CMOV-NEXT: xorl $31, %edx
; X86-CMOV-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-CMOV-NEXT: xorl $31, %eax
; X86-CMOV-NEXT: addl $32, %eax
; X86-CMOV-NEXT: orl $32, %eax
; X86-CMOV-NEXT: testl %ecx, %ecx
; X86-CMOV-NEXT: cmovnel %edx, %eax
; X86-CMOV-NEXT: xorl $63, %eax
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
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Expand Up @@ -234,19 +234,19 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: xorl $31, %edx
; X86-NEXT: bsrl %ebx, %ecx
; X86-NEXT: xorl $31, %ecx
; X86-NEXT: addl $32, %ecx
; X86-NEXT: orl $32, %ecx
; X86-NEXT: testl %esi, %esi
; X86-NEXT: cmovnel %edx, %ecx
; X86-NEXT: bsrl %ebp, %edx
; X86-NEXT: xorl $31, %edx
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: bsrl %edi, %edi
; X86-NEXT: xorl $31, %edi
; X86-NEXT: addl $32, %edi
; X86-NEXT: orl $32, %edi
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: testl %ebp, %ebp
; X86-NEXT: cmovnel %edx, %edi
; X86-NEXT: addl $64, %edi
; X86-NEXT: orl $64, %edi
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebx, %edx
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
Expand All @@ -258,18 +258,18 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-NEXT: bsrl %ebp, %ecx
; X86-NEXT: xorl $31, %ecx
; X86-NEXT: addl $32, %ecx
; X86-NEXT: orl $32, %ecx
; X86-NEXT: testl %ebx, %ebx
; X86-NEXT: cmovnel %edx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: bsrl %eax, %esi
; X86-NEXT: xorl $31, %esi
; X86-NEXT: bsrl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: xorl $31, %edx
; X86-NEXT: addl $32, %edx
; X86-NEXT: orl $32, %edx
; X86-NEXT: testl %eax, %eax
; X86-NEXT: cmovnel %esi, %edx
; X86-NEXT: addl $64, %edx
; X86-NEXT: orl $64, %edx
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: orl %ebx, %esi
; X86-NEXT: cmovnel %ecx, %edx
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
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Expand Up @@ -199,7 +199,7 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: xorl $31, %edx
; X86-NEXT: bsrl %esi, %ecx
; X86-NEXT: xorl $31, %ecx
; X86-NEXT: addl $32, %ecx
; X86-NEXT: orl $32, %ecx
; X86-NEXT: testl %edi, %edi
; X86-NEXT: movl %edi, %ebx
; X86-NEXT: cmovnel %edx, %ecx
Expand All @@ -210,10 +210,10 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: xorl $31, %ebp
; X86-NEXT: addl $32, %ebp
; X86-NEXT: orl $32, %ebp
; X86-NEXT: testl %eax, %eax
; X86-NEXT: cmovnel %edx, %ebp
; X86-NEXT: addl $64, %ebp
; X86-NEXT: orl $64, %ebp
; X86-NEXT: movl %edi, %edx
; X86-NEXT: orl %ebx, %edx
; X86-NEXT: cmovnel %ecx, %ebp
Expand All @@ -223,18 +223,18 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bsrl %eax, %ecx
; X86-NEXT: xorl $31, %ecx
; X86-NEXT: addl $32, %ecx
; X86-NEXT: orl $32, %ecx
; X86-NEXT: testl %esi, %esi
; X86-NEXT: cmovnel %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: bsrl %edi, %esi
; X86-NEXT: xorl $31, %esi
; X86-NEXT: bsrl {{[0-9]+}}(%esp), %edx
; X86-NEXT: xorl $31, %edx
; X86-NEXT: addl $32, %edx
; X86-NEXT: orl $32, %edx
; X86-NEXT: testl %edi, %edi
; X86-NEXT: cmovnel %esi, %edx
; X86-NEXT: addl $64, %edx
; X86-NEXT: orl $64, %edx
; X86-NEXT: orl %ebx, %eax
; X86-NEXT: cmovnel %ecx, %edx
; X86-NEXT: subl %edx, %ebp
Expand Down
45 changes: 12 additions & 33 deletions llvm/test/CodeGen/X86/lzcnt-cmp.ll
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Expand Up @@ -19,13 +19,13 @@ define i1 @lshr_ctlz_cmpeq_one_i64(i64 %in) nounwind {
; X64-BSR-NEXT: # %bb.2: # %cond.false
; X64-BSR-NEXT: bsrq %rdi, %rax
; X64-BSR-NEXT: xorq $63, %rax
; X64-BSR-NEXT: jmp .LBB0_3
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: retq
; X64-BSR-NEXT: .LBB0_1:
; X64-BSR-NEXT: movl $64, %eax
; X64-BSR-NEXT: .LBB0_3: # %cond.end
; X64-BSR-NEXT: shrq $6, %rax
; X64-BSR-NEXT: cmpq $1, %rax
; X64-BSR-NEXT: sete %al
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: retq
;
; X64-LZCNT-LABEL: lshr_ctlz_cmpeq_one_i64:
Expand All @@ -43,15 +43,6 @@ define i1 @lshr_ctlz_undef_cmpeq_one_i64(i64 %in) nounwind {
; X86-BSR-LABEL: lshr_ctlz_undef_cmpeq_one_i64:
; X86-BSR: # %bb.0:
; X86-BSR-NEXT: xorl %eax, %eax
; X86-BSR-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-BSR-NEXT: jne .LBB1_2
; X86-BSR-NEXT: # %bb.1:
; X86-BSR-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-BSR-NEXT: xorl $31, %eax
; X86-BSR-NEXT: addl $32, %eax
; X86-BSR-NEXT: .LBB1_2:
; X86-BSR-NEXT: shrl $6, %eax
; X86-BSR-NEXT: # kill: def $al killed $al killed $eax
; X86-BSR-NEXT: retl
;
; X86-LZCNT-LABEL: lshr_ctlz_undef_cmpeq_one_i64:
Expand All @@ -67,9 +58,7 @@ define i1 @lshr_ctlz_undef_cmpeq_one_i64(i64 %in) nounwind {
;
; X64-BSR-LABEL: lshr_ctlz_undef_cmpeq_one_i64:
; X64-BSR: # %bb.0:
; X64-BSR-NEXT: bsrq %rdi, %rax
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: xorl %eax, %eax
; X64-BSR-NEXT: retq
;
; X64-LZCNT-LABEL: lshr_ctlz_undef_cmpeq_one_i64:
Expand Down Expand Up @@ -99,12 +88,13 @@ define i1 @lshr_ctlz_cmpne_zero_i64(i64 %in) nounwind {
; X64-BSR-NEXT: # %bb.2: # %cond.false
; X64-BSR-NEXT: bsrq %rdi, %rax
; X64-BSR-NEXT: xorq $63, %rax
; X64-BSR-NEXT: jmp .LBB2_3
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: retq
; X64-BSR-NEXT: .LBB2_1:
; X64-BSR-NEXT: movl $64, %eax
; X64-BSR-NEXT: .LBB2_3: # %cond.end
; X64-BSR-NEXT: testq $-64, %rax
; X64-BSR-NEXT: setne %al
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: retq
;
; X64-LZCNT-LABEL: lshr_ctlz_cmpne_zero_i64:
Expand All @@ -122,15 +112,6 @@ define i1 @lshr_ctlz_undef_cmpne_zero_i64(i64 %in) nounwind {
; X86-BSR-LABEL: lshr_ctlz_undef_cmpne_zero_i64:
; X86-BSR: # %bb.0:
; X86-BSR-NEXT: xorl %eax, %eax
; X86-BSR-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-BSR-NEXT: jne .LBB3_2
; X86-BSR-NEXT: # %bb.1:
; X86-BSR-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X86-BSR-NEXT: xorl $31, %eax
; X86-BSR-NEXT: addl $32, %eax
; X86-BSR-NEXT: .LBB3_2:
; X86-BSR-NEXT: shrl $6, %eax
; X86-BSR-NEXT: # kill: def $al killed $al killed $eax
; X86-BSR-NEXT: retl
;
; X86-LZCNT-LABEL: lshr_ctlz_undef_cmpne_zero_i64:
Expand All @@ -146,9 +127,7 @@ define i1 @lshr_ctlz_undef_cmpne_zero_i64(i64 %in) nounwind {
;
; X64-BSR-LABEL: lshr_ctlz_undef_cmpne_zero_i64:
; X64-BSR: # %bb.0:
; X64-BSR-NEXT: bsrq %rdi, %rax
; X64-BSR-NEXT: shrl $6, %eax
; X64-BSR-NEXT: # kill: def $al killed $al killed $rax
; X64-BSR-NEXT: xorl %eax, %eax
; X64-BSR-NEXT: retq
;
; X64-LZCNT-LABEL: lshr_ctlz_undef_cmpne_zero_i64:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/pr38539.ll
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Expand Up @@ -52,7 +52,7 @@ define void @f() nounwind {
; X86-NEXT: # %bb.2: # %BB_udiv-special-cases
; X86-NEXT: bsrl %edx, %eax
; X86-NEXT: xorl $31, %eax
; X86-NEXT: addl $32, %eax
; X86-NEXT: orl $32, %eax
; X86-NEXT: jmp .LBB0_3
; X86-NEXT: .LBB0_1:
; X86-NEXT: bsrl %ecx, %eax
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/pr40090.ll
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Expand Up @@ -5,7 +5,7 @@ define i64 @foo(i64 %x, i64 %y) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
; CHECK-NEXT: bsrq %rdi, %rax
; CHECK-NEXT: xorq $64, %rax
; CHECK-NEXT: orq $64, %rax
; CHECK-NEXT: bsrq %rsi, %rcx
; CHECK-NEXT: cmoveq %rax, %rcx
; CHECK-NEXT: movl $63, %eax
Expand Down
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