Skip to content

[test][AArch64][CodeGen] Enhance GOT-related tests #101968

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Aug 5, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 5 additions & 7 deletions llvm/test/CodeGen/AArch64/basic-pic.ll
Original file line number Diff line number Diff line change
Expand Up @@ -4,21 +4,19 @@

define i32 @get_globalvar() {
; CHECK-LABEL: get_globalvar:
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
; CHECK-NEXT: ldr x[[GOTLOC:[0-9]+]], [x[[GOTHI]], :got_lo12:var]
; CHECK-NEXT: ldr w0, [x[[GOTLOC]]]

%val = load i32, ptr @var
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
; CHECK: ldr x[[GOTLOC:[0-9]+]], [x[[GOTHI]], :got_lo12:var]
; CHECK: ldr w0, [x[[GOTLOC]]]

ret i32 %val
}

define ptr @get_globalvaraddr() {
; CHECK-LABEL: get_globalvaraddr:
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
; CHECK-NEXT: ldr x0, [x[[GOTHI]], :got_lo12:var]

%val = load i32, ptr @var
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
; CHECK: ldr x0, [x[[GOTHI]], :got_lo12:var]

ret ptr @var
}
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/AArch64/elf-globals-pic.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=arm64 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC
; RUN: llc -mtriple=arm64 -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
; RUN: llc -mtriple=arm64 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK
; RUN: llc -mtriple=arm64 -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST

@var8 = external global i8, align 1
@var16 = external global i16, align 2
Expand All @@ -10,14 +10,14 @@ define i8 @test_i8(i8 %new) {
%val = load i8, ptr @var8, align 1
store i8 %new, ptr @var8
ret i8 %val
; CHECK-PIC-LABEL: test_i8:
; CHECK-PIC: adrp x[[HIREG:[0-9]+]], :got:var8
; CHECK-PIC: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
; CHECK-PIC: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]]
; CHECK-LABEL: test_i8:
; CHECK: adrp x[[HIREG:[0-9]+]], :got:var8
; CHECK-NEXT: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
; CHECK-NEXT: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]]

; CHECK-FAST-PIC: adrp x[[HIREG:[0-9]+]], :got:var8
; CHECK-FAST-PIC: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
; CHECK-FAST-PIC: ldr {{w[0-9]+}}, [x[[VARADDR]]]
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], :got:var8
; CHECK-FAST-NEXT: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
; CHECK-FAST-NEXT: ldrb {{w[0-9]+}}, [x[[VARADDR]]]
}

define i16 @test_i16(i16 %new) {
Expand Down Expand Up @@ -50,11 +50,11 @@ define i32 @test_vis() {
%rhs = load i32, ptr @protectedvar, align 4
%ret = add i32 %lhs, %rhs
ret i32 %ret
; CHECK-PIC-LABEL: test_vis:
; CHECK-PIC: adrp {{x[0-9]+}}, hiddenvar
; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar]
; CHECK-PIC: adrp {{x[0-9]+}}, protectedvar
; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar]
; CHECK-LABEL: test_vis:
; CHECK: adrp {{x[0-9]+}}, hiddenvar
; CHECK-NEXT: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar]
; CHECK-NEXT: adrp {{x[0-9]+}}, protectedvar
; CHECK-NEXT: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar]
}

@var_default = external global [2 x i32]
Expand Down
40 changes: 19 additions & 21 deletions llvm/test/CodeGen/AArch64/extern-weak.ll
Original file line number Diff line number Diff line change
Expand Up @@ -11,19 +11,18 @@ define ptr @foo() {
; otherwise a litpool entry.
ret ptr @var


; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:var
; CHECK: ldr x0, [x[[ADDRHI]], :got_lo12:var]
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:var
; CHECK-NEXT: ldr x0, [x[[ADDRHI]], :got_lo12:var]

; In the large model, the usual relocations are absolute and can
; materialise 0.
; CHECK-LARGE: movz x0, #:abs_g0_nc:var
; CHECK-LARGE: movk x0, #:abs_g1_nc:var
; CHECK-LARGE: movk x0, #:abs_g2_nc:var
; CHECK-LARGE: movk x0, #:abs_g3:var
; CHECK-LARGE: movz x0, #:abs_g0_nc:var
; CHECK-LARGE-NEXT: movk x0, #:abs_g1_nc:var
; CHECK-LARGE-NEXT: movk x0, #:abs_g2_nc:var
; CHECK-LARGE-NEXT: movk x0, #:abs_g3:var

; In the tiny codemodel we us a got relocated LDR.
; CHECK-TINY: ldr x0, :got:var
; CHECK-TINY: ldr x0, :got:var
}


Expand All @@ -32,10 +31,9 @@ define ptr @foo() {
define ptr @bar() {
%addr = getelementptr [10 x i32], ptr @arr_var, i32 0, i32 5


; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:arr_var
; CHECK: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
; CHECK: add x0, [[BASE]], #20
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:arr_var
; CHECK-NEXT: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
; CHECK-NEXT: add x0, [[BASE]], #20

ret ptr %addr

Expand All @@ -44,22 +42,22 @@ define ptr @bar() {
; CHECK-LARGE-NEXT: ldr x[[ADDR]], [x[[ADDR]], :got_lo12:arr_var]
; CHECK-LARGE-NEXT: add x0, x[[ADDR]], #20

; CHECK-TINY: ldr [[BASE:x[0-9]+]], :got:arr_var
; CHECK-TINY: add x0, [[BASE]], #20
; CHECK-TINY: ldr [[BASE:x[0-9]+]], :got:arr_var
; CHECK-TINY-NEXT: add x0, [[BASE]], #20
}

@defined_weak_var = internal unnamed_addr global i32 0

define ptr @wibble() {
ret ptr @defined_weak_var

; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK: add x0, [[BASE]], :lo12:defined_weak_var
; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
; CHECK-NEXT: add x0, [[BASE]], :lo12:defined_weak_var

; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var
; CHECK-LARGE: movk x0, #:abs_g3:defined_weak_var
; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
; CHECK-LARGE-NEXT: movk x0, #:abs_g1_nc:defined_weak_var
; CHECK-LARGE-NEXT: movk x0, #:abs_g2_nc:defined_weak_var
; CHECK-LARGE-NEXT: movk x0, #:abs_g3:defined_weak_var

; CHECK-TINY: adr x0, defined_weak_var
; CHECK-TINY: adr x0, defined_weak_var
}
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/got-abuse.ll
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ define void @foo() nounwind {
; CHECK-LABEL: foo:
entry:
call void @consume(i32 ptrtoint (ptr @func to i32))
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:func
; CHECK: ldr {{x[0-9]+}}, [x[[ADDRHI]], {{#?}}:got_lo12:func]
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:func
; CHECK-NEXT: ldr {{x[0-9]+}}, [x[[ADDRHI]], {{#?}}:got_lo12:func]
ret void
}

41 changes: 20 additions & 21 deletions llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
; RUN: llc --relocation-model=pic < %s \
; RUN: | FileCheck %s --check-prefix=CHECK-PIC
; RUN: llc --relocation-model=pic < %s | FileCheck %s

; Ensure that GlobalISel lowers correctly. GlobalISel is the default ISel for
; -O0 on aarch64. GlobalISel lowers the instruction sequence in the static
Expand All @@ -13,7 +12,7 @@
; mind the code size and performance increase.

; RUN: llc --aarch64-enable-global-isel-at-O=0 -O0 --relocation-model=pic < %s \
; RUN: | FileCheck %s --check-prefix=CHECK-PIC
; RUN: | FileCheck %s

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-android"
Expand All @@ -22,41 +21,41 @@ target triple = "aarch64-unknown-linux-android"
declare void @func()

define ptr @global_addr() #0 {
; CHECK-PIC: global_addr:
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
; CHECK-PIC: ldr x0, [[[REG]], :got_lo12:global]
; CHECK-PIC: ret
; CHECK-LABEL: global_addr:
; CHECK: adrp [[REG:x[0-9]+]], :got:global
; CHECK-NEXT: ldr x0, [[[REG]], :got_lo12:global]
; CHECK-NEXT: ret

ret ptr @global
}

define i32 @global_load() #0 {
; CHECK-PIC: global_load:
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
; CHECK-PIC: ldr [[REG]], [[[REG]], :got_lo12:global]
; CHECK-PIC: ldr w0, [[[REG]]]
; CHECK-PIC: ret
; CHECK-LABEL: global_load:
; CHECK: adrp [[REG:x[0-9]+]], :got:global
; CHECK-NEXT: ldr [[REG]], [[[REG]], :got_lo12:global]
; CHECK-NEXT: ldr w0, [[[REG]]]
; CHECK-NEXT: ret

%load = load i32, ptr @global
ret i32 %load
}

define void @global_store() #0 {
; CHECK-PIC: global_store:
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
; CHECK-PIC: ldr [[REG]], [[[REG]], :got_lo12:global]
; CHECK-PIC: str wzr, [[[REG]]]
; CHECK-PIC: ret
; CHECK-LABEL: global_store:
; CHECK: adrp [[REG:x[0-9]+]], :got:global
; CHECK-NEXT: ldr [[REG]], [[[REG]], :got_lo12:global]
; CHECK-NEXT: str wzr, [[[REG]]]
; CHECK-NEXT: ret

store i32 0, ptr @global
ret void
}

define ptr @func_addr() #0 {
; CHECK-PIC: func_addr:
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:func
; CHECK-PIC: ldr x0, [[[REG]], :got_lo12:func]
; CHECK-PIC: ret
; CHECK-LABEL: func_addr:
; CHECK: adrp [[REG:x[0-9]+]], :got:func
; CHECK-NEXT: ldr x0, [[[REG]], :got_lo12:func]
; CHECK-NEXT: ret

ret ptr @func
}
Expand Down
Loading