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[RISCV] Support llvm.masked.expandload intrinsic #101954

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46 changes: 41 additions & 5 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11122,6 +11122,7 @@ SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,
SDValue BasePtr = MemSD->getBasePtr();

SDValue Mask, PassThru, VL;
bool IsExpandingLoad = false;
if (const auto *VPLoad = dyn_cast<VPLoadSDNode>(Op)) {
Mask = VPLoad->getMask();
PassThru = DAG.getUNDEF(VT);
Expand All @@ -11130,6 +11131,7 @@ SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,
const auto *MLoad = cast<MaskedLoadSDNode>(Op);
Mask = MLoad->getMask();
PassThru = MLoad->getPassThru();
IsExpandingLoad = MLoad->isExpandingLoad();
}

bool IsUnmasked = ISD::isConstantSplatVectorAllOnes(Mask.getNode());
Expand All @@ -11149,25 +11151,59 @@ SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,
if (!VL)
VL = getDefaultVLOps(VT, ContainerVT, DL, DAG, Subtarget).second;

unsigned IntID =
IsUnmasked ? Intrinsic::riscv_vle : Intrinsic::riscv_vle_mask;
SDValue ExpandingVL;
if (!IsUnmasked && IsExpandingLoad) {
ExpandingVL = VL;
VL =
DAG.getNode(RISCVISD::VCPOP_VL, DL, XLenVT, Mask,
getAllOnesMask(Mask.getSimpleValueType(), VL, DL, DAG), VL);
}

unsigned IntID = IsUnmasked || IsExpandingLoad ? Intrinsic::riscv_vle
: Intrinsic::riscv_vle_mask;
SmallVector<SDValue, 8> Ops{Chain, DAG.getTargetConstant(IntID, DL, XLenVT)};
if (IsUnmasked)
if (IntID == Intrinsic::riscv_vle)
Ops.push_back(DAG.getUNDEF(ContainerVT));
else
Ops.push_back(PassThru);
Ops.push_back(BasePtr);
if (!IsUnmasked)
if (IntID == Intrinsic::riscv_vle_mask)
Ops.push_back(Mask);
Ops.push_back(VL);
if (!IsUnmasked)
if (IntID == Intrinsic::riscv_vle_mask)
Ops.push_back(DAG.getTargetConstant(RISCVII::TAIL_AGNOSTIC, DL, XLenVT));

SDVTList VTs = DAG.getVTList({ContainerVT, MVT::Other});

SDValue Result =
DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops, MemVT, MMO);
Chain = Result.getValue(1);
if (ExpandingVL) {
MVT IndexVT = ContainerVT;
if (ContainerVT.isFloatingPoint())
IndexVT = ContainerVT.changeVectorElementTypeToInteger();

MVT IndexEltVT = IndexVT.getVectorElementType();
bool UseVRGATHEREI16 = false;
// If index vector is an i8 vector and the element count exceeds 256, we
// should change the element type of index vector to i16 to avoid
// overflow.
if (IndexEltVT == MVT::i8 && VT.getVectorNumElements() > 256) {
// FIXME: We need to do vector splitting manually for LMUL=8 cases.
assert(getLMUL(IndexVT) != RISCVII::LMUL_8);
IndexVT = IndexVT.changeVectorElementType(MVT::i16);
UseVRGATHEREI16 = true;
}

SDValue Iota =
DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, IndexVT,
DAG.getConstant(Intrinsic::riscv_viota, DL, XLenVT),
DAG.getUNDEF(IndexVT), Mask, ExpandingVL);
Result =
DAG.getNode(UseVRGATHEREI16 ? RISCVISD::VRGATHEREI16_VV_VL
: RISCVISD::VRGATHER_VV_VL,
DL, ContainerVT, Result, Iota, PassThru, Mask, ExpandingVL);
}

if (VT.isFixedLengthVector())
Result = convertFromScalableVector(VT, Result, DAG, Subtarget);
Expand Down
17 changes: 17 additions & 0 deletions llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2298,6 +2298,23 @@ bool RISCVTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
C2.ScaleCost, C2.ImmCost, C2.SetupCost);
}

bool RISCVTTIImpl::isLegalMaskedExpandLoad(Type *DataTy, Align Alignment) {
auto *VTy = dyn_cast<VectorType>(DataTy);
if (!VTy || VTy->isScalableTy())
return false;

if (!isLegalMaskedLoadStore(DataTy, Alignment))
return false;

// FIXME: If it is an i8 vector and the element count exceeds 256, we should
// scalarize these types with LMUL >= maximum fixed-length LMUL.
if (VTy->getElementType()->isIntegerTy(8))
if (VTy->getElementCount().getFixedValue() > 256)
return VTy->getPrimitiveSizeInBits() / ST->getRealMinVLen() <
ST->getMaxLMULForFixedLengthVectors();
return true;
}

bool RISCVTTIImpl::isLegalMaskedCompressStore(Type *DataTy, Align Alignment) {
auto *VTy = dyn_cast<VectorType>(DataTy);
if (!VTy || VTy->isScalableTy())
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -301,6 +301,8 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
DL);
}

bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment);

bool isLegalMaskedCompressStore(Type *DataTy, Align Alignment);

bool isVScaleKnownToBeAPowerOfTwo() const {
Expand Down
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