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[RISCV] PseudoVCPOP_M_B8_MASK transforms into incorrect machine code after RISCVVectorPeephole #122245

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BeMg opened this issue Jan 9, 2025 · 2 comments · Fixed by #122253
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@BeMg
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BeMg commented Jan 9, 2025

https://godbolt.org/z/4sxvzGoPG

#include <iostream>
#include <riscv_vector.h>
using std::cerr;
using std::endl;
template <class T> bool __attribute__((noinline)) check(T, T) {}
unsigned long main_var_59;
int main() {
  unsigned long var_61;
  vbool8_t var_8 = __riscv_vmset_m_b8(7);
  unsigned long var_5 = __riscv_vcpop_m_b8_m(var_8, var_8, 6);
  vbool8_t var_19;
  if (check(var_5, var_61))
    cerr << endl;
  unsigned long var_4 = __riscv_vcpop_m_b8_m(var_8, var_19, 8);
  check(var_4, main_var_59);
}
# After RISC-V Vector Peephole Optimization
# Machine code for function main: IsSSA, TracksLiveness

...
*** Bad machine code: Too few operands ***
- function:    main
- basic block: %bb.7  (0x411b1a70)
- instruction: %20:gpr = PseudoVCPOP_M_B8 8, 0, debug-location !1042; example.cpp:14:25
4 operands expected, but 3 given.

*** Bad machine code: Expected a register operand. ***
- function:    main
- basic block: %bb.7  (0x411b1a70)
- instruction: %20:gpr = PseudoVCPOP_M_B8 8, 0, debug-location !1042; example.cpp:14:25
- operand 1:   8

Maybe this line

MI.removeOperand(PassthruOpIdx);
which comes from 1294407 is reason.

@BeMg
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BeMg commented Jan 9, 2025

cc @lukel97 @preames

@lukel97 lukel97 self-assigned this Jan 9, 2025
lukel97 added a commit to lukel97/llvm-project that referenced this issue Jan 9, 2025
… passthru

Some masked pseudos like PseudoVCPOP_M_B8_MASK don't have a passthru, but in the masked->unmasked peephole we assumed the masked pseudo always had one.

This checks for a passthru first and fixes llvm#122245.
@lukel97 lukel97 closed this as completed in c8ee116 Jan 9, 2025
@llvmbot
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llvmbot commented Jan 9, 2025

@llvm/issue-subscribers-backend-risc-v

Author: Piyou Chen (BeMg)

https://godbolt.org/z/4sxvzGoPG
#include &lt;iostream&gt;
#include &lt;riscv_vector.h&gt;
using std::cerr;
using std::endl;
template &lt;class T&gt; bool __attribute__((noinline)) check(T, T) {}
unsigned long main_var_59;
int main() {
  unsigned long var_61;
  vbool8_t var_8 = __riscv_vmset_m_b8(7);
  unsigned long var_5 = __riscv_vcpop_m_b8_m(var_8, var_8, 6);
  vbool8_t var_19;
  if (check(var_5, var_61))
    cerr &lt;&lt; endl;
  unsigned long var_4 = __riscv_vcpop_m_b8_m(var_8, var_19, 8);
  check(var_4, main_var_59);
}
# After RISC-V Vector Peephole Optimization
# Machine code for function main: IsSSA, TracksLiveness

...
*** Bad machine code: Too few operands ***
- function:    main
- basic block: %bb.7  (0x411b1a70)
- instruction: %20:gpr = PseudoVCPOP_M_B8 8, 0, debug-location !1042; example.cpp:14:25
4 operands expected, but 3 given.

*** Bad machine code: Expected a register operand. ***
- function:    main
- basic block: %bb.7  (0x411b1a70)
- instruction: %20:gpr = PseudoVCPOP_M_B8 8, 0, debug-location !1042; example.cpp:14:25
- operand 1:   8

Maybe this line

MI.removeOperand(PassthruOpIdx);
which comes from 1294407 is reason.

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