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On 32-bit x86, half return ABI is incorrect when SSE is enabled but SSE2 is disabled #112890

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@beetrees

Consider the following IR (compiler explorer):

target triple = "i586-unknown-linux-gnu"

define half @only_sse(half) #0 {
    ret half %0
}

attributes #0 = { "target-features"="+sse,-sse2" }

define half @sse_and_sse2(half) #1 {
    ret half %0
}

attributes #1 = { "target-features"="+sse,+sse2" }

The 32-bit x86 ABI for returning half is specified as using the xmm0 register. As both only_sse and sse_and_sse2 have SSE registers available, they should both be able to use the specified ABI. However, LLVM currently only compiles sse_and_sse2 correctly, with only_sse incorrectly returning the half in eax instead.

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