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[lld][ARM] Don't emit veneers for wraparound branches. (#165263)
If an instruction at the high end of the 32-bit address space branches to one at the low end, then the branch can be within range for a B or BL instruction, and doesn't need a veneer. `ARM::inBranchRange` was failing to detect this because it calculated the offset as an int64_t, so that the offset was a small value ± 2^32 instead of just the small value. Fixes #165211.
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lld/ELF/Arch/ARM.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -472,7 +472,7 @@ bool ARM::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
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// Bit 0 == 1 denotes Thumb state, it is not part of the range.
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dst &= ~0x1;
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int64_t offset = dst - src;
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int64_t offset = llvm::SignExtend64<32>(dst - src);
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switch (type) {
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case R_ARM_PC24:
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case R_ARM_PLT32:
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@@ -0,0 +1,102 @@
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// REQUIRES: arm
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// RUN: rm -rf %t && split-file %s %t && cd %t
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// RUN: llvm-mc -filetype=obj -triple=armv7-none-eabi code.s -o code.o
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// RUN: ld.lld -T unsigned1.ld code.o -o unsigned1.elf
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// RUN: llvm-objdump --triple=armv7 --no-show-raw-insn -d unsigned1.elf | FileCheck %s --check-prefix=UNSIGNED1
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// RUN: ld.lld -T unsigned2.ld code.o -o unsigned2.elf
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// RUN: llvm-objdump --triple=armv7 --no-show-raw-insn -d unsigned2.elf | FileCheck %s --check-prefix=UNSIGNED2
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// RUN: ld.lld -T signed1.ld code.o -o signed1.elf
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// RUN: llvm-objdump --triple=armv7 --no-show-raw-insn -d signed1.elf | FileCheck %s --check-prefix=SIGNED1
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// RUN: ld.lld -T signed2.ld code.o -o signed2.elf
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// RUN: llvm-objdump --triple=armv7 --no-show-raw-insn -d signed2.elf | FileCheck %s --check-prefix=SIGNED2
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/// The aim of this test is to ensure that a BL instruction near one end of the
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/// address space can reach a function at the extreme other end, directly,
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/// using a branch offset that makes the address wrap round. We check this at
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/// both the unsigned wraparound point (one address near 0 and the other near
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/// 0xFFFFFFFF) and the signed wraparound point (addresses either side of
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/// 0x80000000), crossing the boundary in both directions. In all four cases we
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/// expect a direct branch with no veneer.
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// UNSIGNED1: Disassembly of section .text.lowaddr:
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// UNSIGNED1: <func>:
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// UNSIGNED1: 10000: bx lr
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//
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// UNSIGNED1: Disassembly of section .text.highaddr:
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// UNSIGNED1: <_start>:
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// UNSIGNED1: ffff0000: bl 0x10000
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// UNSIGNED1-NEXT: bx lr
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// UNSIGNED2: Disassembly of section .text.lowaddr:
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// UNSIGNED2: <_start>:
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// UNSIGNED2: 10000: bl 0xffff0000
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// UNSIGNED2-NEXT: bx lr
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//
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// UNSIGNED2: Disassembly of section .text.highaddr:
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// UNSIGNED2: <func>:
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// UNSIGNED2: ffff0000: bx lr
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// SIGNED1: Disassembly of section .text.posaddr:
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// SIGNED1: <_start>:
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// SIGNED1: 7fff0000: bl 0x80010000
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// SIGNED1-NEXT: bx lr
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//
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// SIGNED1: Disassembly of section .text.negaddr:
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// SIGNED1: <func>:
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// SIGNED1: 80010000: bx lr
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// SIGNED2: Disassembly of section .text.posaddr:
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// SIGNED2: <func>:
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// SIGNED2: 7fff0000: bx lr
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//
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// SIGNED2: Disassembly of section .text.negaddr:
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// SIGNED2: <_start>:
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// SIGNED2: 80010000: bl 0x7fff0000
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// SIGNED2-NEXT: bx lr
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//--- code.s
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.section .text.callee, "ax", %progbits
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.global func
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.type func, %function
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func:
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bx lr
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.section .text.caller, "ax", %progbits
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.global _start
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.type _start, %function
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_start:
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bl func
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bx lr
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//--- unsigned1.ld
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ENTRY(_start)
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SECTIONS {
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.text.lowaddr 0x00010000 : AT(0x00010000) { *(.text.callee) }
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.text.highaddr 0xffff0000 : AT(0xffff0000) { *(.text.caller) }
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}
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//--- unsigned2.ld
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ENTRY(_start)
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SECTIONS {
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.text.lowaddr 0x00010000 : AT(0x00010000) { *(.text.caller) }
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.text.highaddr 0xffff0000 : AT(0xffff0000) { *(.text.callee) }
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}
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//--- signed1.ld
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ENTRY(_start)
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SECTIONS {
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.text.posaddr 0x7fff0000 : AT(0x7fff0000) { *(.text.caller) }
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.text.negaddr 0x80010000 : AT(0x80010000) { *(.text.callee) }
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}
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//--- signed2.ld
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ENTRY(_start)
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SECTIONS {
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.text.posaddr 0x7fff0000 : AT(0x7fff0000) { *(.text.callee) }
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.text.negaddr 0x80010000 : AT(0x80010000) { *(.text.caller) }
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}

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