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arsenmarsenm
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Check for immediate legality
This avoids the x86_32 regressions, at the expense of several other cases.
1 parent 7ec4e66 commit f0ea19f

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4 files changed

+63
-60
lines changed

4 files changed

+63
-60
lines changed

‎llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8739,7 +8739,10 @@ SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op,
87398739
isCondCodeLegalOrCustom(IsOrderedInf ? OrderedCmpOpcode
87408740
: UnorderedCmpOpcode,
87418741
OperandVT.getScalarType().getSimpleVT()) &&
8742-
isOperationLegalOrCustom(ISD::FABS, OperandVT.getScalarType())) {
8742+
isOperationLegalOrCustom(ISD::FABS, OperandVT.getScalarType()) &&
8743+
(isOperationLegal(ISD::ConstantFP, OperandVT.getScalarType()) ||
8744+
(OperandVT.isVector() &&
8745+
isOperationLegalOrCustom(ISD::BUILD_VECTOR, OperandVT)))) {
87438746
// isinf(x) --> fabs(x) == inf
87448747
SDValue Abs = DAG.getNode(ISD::FABS, DL, OperandVT, Op);
87458748
SDValue Inf =

‎llvm/test/CodeGen/AArch64/isinf.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,10 @@ define i32 @replace_isinf_call_f16(half %x) {
2626
define i32 @replace_isinf_call_f32(float %x) {
2727
; CHECK-LABEL: replace_isinf_call_f32:
2828
; CHECK: // %bb.0:
29-
; CHECK-NEXT: fabs s0, s0
29+
; CHECK-NEXT: fmov w9, s0
3030
; CHECK-NEXT: mov w8, #2139095040 // =0x7f800000
31-
; CHECK-NEXT: fmov s1, w8
32-
; CHECK-NEXT: fcmp s0, s1
31+
; CHECK-NEXT: and w9, w9, #0x7fffffff
32+
; CHECK-NEXT: cmp w9, w8
3333
; CHECK-NEXT: cset w0, eq
3434
; CHECK-NEXT: ret
3535
%abs = tail call float @llvm.fabs.f32(float %x)
@@ -42,10 +42,10 @@ define i32 @replace_isinf_call_f32(float %x) {
4242
define i32 @replace_isinf_call_f64(double %x) {
4343
; CHECK-LABEL: replace_isinf_call_f64:
4444
; CHECK: // %bb.0:
45-
; CHECK-NEXT: fabs d0, d0
45+
; CHECK-NEXT: fmov x9, d0
4646
; CHECK-NEXT: mov x8, #9218868437227405312 // =0x7ff0000000000000
47-
; CHECK-NEXT: fmov d1, x8
48-
; CHECK-NEXT: fcmp d0, d1
47+
; CHECK-NEXT: and x9, x9, #0x7fffffffffffffff
48+
; CHECK-NEXT: cmp x9, x8
4949
; CHECK-NEXT: cset w0, eq
5050
; CHECK-NEXT: ret
5151
%abs = tail call double @llvm.fabs.f64(double %x)

‎llvm/test/CodeGen/PowerPC/fp-classify.ll

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,13 @@
77
define zeroext i1 @abs_isinff(float %x) {
88
; P8-LABEL: abs_isinff:
99
; P8: # %bb.0: # %entry
10-
; P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
11-
; P8-NEXT: xsabsdp 0, 1
12-
; P8-NEXT: li 4, 1
13-
; P8-NEXT: lfs 1, .LCPI0_0@toc@l(3)
14-
; P8-NEXT: li 3, 0
15-
; P8-NEXT: fcmpu 0, 0, 1
16-
; P8-NEXT: iseleq 3, 4, 3
10+
; P8-NEXT: xscvdpspn 0, 1
11+
; P8-NEXT: lis 4, 32640
12+
; P8-NEXT: mffprwz 3, 0
13+
; P8-NEXT: clrlwi 3, 3, 1
14+
; P8-NEXT: xor 3, 3, 4
15+
; P8-NEXT: cntlzw 3, 3
16+
; P8-NEXT: srwi 3, 3, 5
1717
; P8-NEXT: blr
1818
;
1919
; P9-LABEL: abs_isinff:
@@ -32,13 +32,13 @@ entry:
3232
define zeroext i1 @abs_isinf(double %x) {
3333
; P8-LABEL: abs_isinf:
3434
; P8: # %bb.0: # %entry
35-
; P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
36-
; P8-NEXT: xsabsdp 0, 1
37-
; P8-NEXT: li 4, 1
38-
; P8-NEXT: lfs 1, .LCPI1_0@toc@l(3)
39-
; P8-NEXT: li 3, 0
40-
; P8-NEXT: fcmpu 0, 0, 1
41-
; P8-NEXT: iseleq 3, 4, 3
35+
; P8-NEXT: mffprd 3, 1
36+
; P8-NEXT: li 4, 2047
37+
; P8-NEXT: rldic 4, 4, 52, 1
38+
; P8-NEXT: clrldi 3, 3, 1
39+
; P8-NEXT: xor 3, 3, 4
40+
; P8-NEXT: cntlzd 3, 3
41+
; P8-NEXT: rldicl 3, 3, 58, 63
4242
; P8-NEXT: blr
4343
;
4444
; P9-LABEL: abs_isinf:

‎llvm/test/CodeGen/X86/is_fpclass.ll

Lines changed: 39 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -240,22 +240,18 @@ entry:
240240
define i1 @isfinite_f(float %x) {
241241
; X86-LABEL: isfinite_f:
242242
; X86: # %bb.0: # %entry
243-
; X86-NEXT: flds {{[0-9]+}}(%esp)
244-
; X86-NEXT: fabs
245-
; X86-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
246-
; X86-NEXT: fxch %st(1)
247-
; X86-NEXT: fucompp
248-
; X86-NEXT: fnstsw %ax
249-
; X86-NEXT: # kill: def $ah killed $ah killed $ax
250-
; X86-NEXT: sahf
251-
; X86-NEXT: setne %al
243+
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
244+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
245+
; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
246+
; X86-NEXT: setl %al
252247
; X86-NEXT: retl
253248
;
254249
; X64-LABEL: isfinite_f:
255250
; X64: # %bb.0: # %entry
256-
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
257-
; X64-NEXT: ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
258-
; X64-NEXT: setne %al
251+
; X64-NEXT: movd %xmm0, %eax
252+
; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
253+
; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
254+
; X64-NEXT: setl %al
259255
; X64-NEXT: retq
260256
entry:
261257
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
@@ -1154,23 +1150,31 @@ entry:
11541150
define i1 @isfinite_d(double %x) {
11551151
; X86-LABEL: isfinite_d:
11561152
; X86: # %bb.0: # %entry
1157-
; X86-NEXT: fldl {{[0-9]+}}(%esp)
1158-
; X86-NEXT: fabs
1159-
; X86-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
1160-
; X86-NEXT: fxch %st(1)
1161-
; X86-NEXT: fucompp
1162-
; X86-NEXT: fnstsw %ax
1163-
; X86-NEXT: # kill: def $ah killed $ah killed $ax
1164-
; X86-NEXT: sahf
1165-
; X86-NEXT: setne %al
1153+
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
1154+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
1155+
; X86-NEXT: cmpl $2146435072, %eax # imm = 0x7FF00000
1156+
; X86-NEXT: setl %al
11661157
; X86-NEXT: retl
11671158
;
1168-
; X64-LABEL: isfinite_d:
1169-
; X64: # %bb.0: # %entry
1170-
; X64-NEXT: andpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1171-
; X64-NEXT: ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1172-
; X64-NEXT: setne %al
1173-
; X64-NEXT: retq
1159+
; X64-GENERIC-LABEL: isfinite_d:
1160+
; X64-GENERIC: # %bb.0: # %entry
1161+
; X64-GENERIC-NEXT: movq %xmm0, %rax
1162+
; X64-GENERIC-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
1163+
; X64-GENERIC-NEXT: andq %rax, %rcx
1164+
; X64-GENERIC-NEXT: movabsq $9218868437227405312, %rax # imm = 0x7FF0000000000000
1165+
; X64-GENERIC-NEXT: cmpq %rax, %rcx
1166+
; X64-GENERIC-NEXT: setl %al
1167+
; X64-GENERIC-NEXT: retq
1168+
;
1169+
; X64-NDD-LABEL: isfinite_d:
1170+
; X64-NDD: # %bb.0: # %entry
1171+
; X64-NDD-NEXT: movq %xmm0, %rax
1172+
; X64-NDD-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
1173+
; X64-NDD-NEXT: andq %rcx, %rax
1174+
; X64-NDD-NEXT: movabsq $9218868437227405312, %rcx # imm = 0x7FF0000000000000
1175+
; X64-NDD-NEXT: cmpq %rcx, %rax
1176+
; X64-NDD-NEXT: setl %al
1177+
; X64-NDD-NEXT: retq
11741178
entry:
11751179
%0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 504) ; 0x1f8 = "finite"
11761180
ret i1 %0
@@ -2049,22 +2053,18 @@ entry:
20492053
define i1 @not_isinf_or_nan_f(float %x) {
20502054
; X86-LABEL: not_isinf_or_nan_f:
20512055
; X86: # %bb.0: # %entry
2052-
; X86-NEXT: flds {{[0-9]+}}(%esp)
2053-
; X86-NEXT: fabs
2054-
; X86-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
2055-
; X86-NEXT: fxch %st(1)
2056-
; X86-NEXT: fucompp
2057-
; X86-NEXT: fnstsw %ax
2058-
; X86-NEXT: # kill: def $ah killed $ah killed $ax
2059-
; X86-NEXT: sahf
2060-
; X86-NEXT: setne %al
2056+
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
2057+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
2058+
; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
2059+
; X86-NEXT: setl %al
20612060
; X86-NEXT: retl
20622061
;
20632062
; X64-LABEL: not_isinf_or_nan_f:
20642063
; X64: # %bb.0: # %entry
2065-
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2066-
; X64-NEXT: ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2067-
; X64-NEXT: setne %al
2064+
; X64-NEXT: movd %xmm0, %eax
2065+
; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
2066+
; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
2067+
; X64-NEXT: setl %al
20682068
; X64-NEXT: retq
20692069
entry:
20702070
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; ~(0x204|0x3) = "~(inf|nan)"

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