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[clang backend] In AArch64's DataLayout, specify a minimum function alignment of 4. (#90702)
This addresses an issue where the explicit alignment of 2 (for C++ ABI reasons) was being propagated to the back end and causing under-aligned functions (in special sections). This is an alternate approach suggested by @efriedma-quic in PR #90415. Fixes #90358
1 parent e123643 commit ddecada

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10 files changed

+57
-46
lines changed

10 files changed

+57
-46
lines changed

‎clang/lib/Basic/Targets/AArch64.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1480,11 +1480,11 @@ AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
14801480
void AArch64leTargetInfo::setDataLayout() {
14811481
if (getTriple().isOSBinFormatMachO()) {
14821482
if(getTriple().isArch32Bit())
1483-
resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128", "_");
1483+
resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32", "_");
14841484
else
1485-
resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128", "_");
1485+
resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128-Fn32", "_");
14861486
} else
1487-
resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
1487+
resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32");
14881488
}
14891489

14901490
void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
@@ -1507,7 +1507,7 @@ void AArch64beTargetInfo::getTargetDefines(const LangOptions &Opts,
15071507

15081508
void AArch64beTargetInfo::setDataLayout() {
15091509
assert(!getTriple().isOSBinFormatMachO());
1510-
resetDataLayout("E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
1510+
resetDataLayout("E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32");
15111511
}
15121512

15131513
WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
@@ -1530,8 +1530,8 @@ WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
15301530

15311531
void WindowsARM64TargetInfo::setDataLayout() {
15321532
resetDataLayout(Triple.isOSBinFormatMachO()
1533-
? "e-m:o-i64:64-i128:128-n32:64-S128"
1534-
: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128",
1533+
? "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
1534+
: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32",
15351535
Triple.isOSBinFormatMachO() ? "_" : "");
15361536
}
15371537

‎clang/test/CodeGen/aarch64-type-sizes.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
// RUN: %clang_cc1 -triple aarch64_be-none-linux-gnu -emit-llvm -w -o - %s | FileCheck %s
22
// char by definition has size 1
33

4-
// CHECK: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
4+
// CHECK: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
55

66
int check_short(void) {
77
return sizeof(short);

‎clang/test/CodeGen/coff-aarch64-type-sizes.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: %clang_cc1 -triple aarch64-windows -emit-llvm -w -o - %s | FileCheck %s
22

3-
// CHECK: target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
3+
// CHECK: target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
44
// CHECK: target triple = "aarch64-unknown-windows-msvc"
55

66
int check_short(void) {

‎clang/test/CodeGen/target-data.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -185,15 +185,15 @@
185185

186186
// RUN: %clang_cc1 -triple arm64-unknown -o - -emit-llvm %s | \
187187
// RUN: FileCheck %s -check-prefix=AARCH64
188-
// AARCH64: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
188+
// AARCH64: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
189189

190190
// RUN: %clang_cc1 -triple arm64_32-apple-ios7.0 -o - -emit-llvm %s | \
191191
// RUN: FileCheck %s -check-prefix=AARCH64-ILP32
192-
// AARCH64-ILP32: target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128"
192+
// AARCH64-ILP32: target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32"
193193

194194
// RUN: %clang_cc1 -triple arm64-pc-win32-macho -o - -emit-llvm %s | \
195195
// RUN: FileCheck %s -check-prefix=AARCH64-WIN32-MACHO
196-
// AARCH64-WIN32-MACHO: target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
196+
// AARCH64-WIN32-MACHO: target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
197197

198198
// RUN: %clang_cc1 -triple thumb-unknown-gnueabi -o - -emit-llvm %s | \
199199
// RUN: FileCheck %s -check-prefix=THUMB

‎clang/test/CodeGenCXX/member-alignment.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,11 +5,11 @@
55
// RUN: %clang_cc1 -emit-llvm -triple ppc64le-unknown-linux-gnu %s -o - | \
66
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
77
// RUN: %clang_cc1 -emit-llvm -triple arm64-unknown-linux-gnu %s -o - | \
8-
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
8+
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
99
// RUN: %clang_cc1 -emit-llvm -triple arm64-apple-ios %s -o - | \
10-
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
10+
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
1111
// RUN: %clang_cc1 -emit-llvm -triple aarch64-unknown-linux-gnu %s -o - | \
12-
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
12+
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
1313
// RUN: %clang_cc1 -emit-llvm -triple mips-unknown-linux-gnu %s -o - | \
1414
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
1515
// RUN: %clang_cc1 -emit-llvm -triple x86_64-unknown-fuchsia %s -o - | \

‎clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2728,7 +2728,7 @@ int main() {
27282728
//
27292729
//
27302730
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
2731-
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2731+
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
27322732
// CHECK9-NEXT: entry:
27332733
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
27342734
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -2741,7 +2741,7 @@ int main() {
27412741
//
27422742
//
27432743
// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2744-
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
2744+
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
27452745
// CHECK9-NEXT: entry:
27462746
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
27472747
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3214,7 +3214,7 @@ int main() {
32143214
//
32153215
//
32163216
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3217-
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3217+
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
32183218
// CHECK9-NEXT: entry:
32193219
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
32203220
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3224,7 +3224,7 @@ int main() {
32243224
//
32253225
//
32263226
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
3227-
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3227+
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
32283228
// CHECK9-NEXT: entry:
32293229
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
32303230
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -3238,7 +3238,7 @@ int main() {
32383238
//
32393239
//
32403240
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3241-
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3241+
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
32423242
// CHECK9-NEXT: entry:
32433243
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
32443244
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3980,7 +3980,7 @@ int main() {
39803980
//
39813981
//
39823982
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
3983-
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3983+
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
39843984
// CHECK13-NEXT: entry:
39853985
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
39863986
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -3993,7 +3993,7 @@ int main() {
39933993
//
39943994
//
39953995
// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3996-
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
3996+
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
39973997
// CHECK13-NEXT: entry:
39983998
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
39993999
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4466,7 +4466,7 @@ int main() {
44664466
//
44674467
//
44684468
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4469-
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
4469+
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
44704470
// CHECK13-NEXT: entry:
44714471
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
44724472
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4476,7 +4476,7 @@ int main() {
44764476
//
44774477
//
44784478
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
4479-
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
4479+
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
44804480
// CHECK13-NEXT: entry:
44814481
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
44824482
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -5093,7 +5093,7 @@ int main() {
50935093
//
50945094
//
50955095
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
5096-
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
5096+
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
50975097
// CHECK13-NEXT: entry:
50985098
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
50995099
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8

‎clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -3235,7 +3235,7 @@ int main() {
32353235
//
32363236
//
32373237
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
3238-
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3238+
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
32393239
// CHECK9-NEXT: entry:
32403240
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
32413241
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -3248,7 +3248,7 @@ int main() {
32483248
//
32493249
//
32503250
// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3251-
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
3251+
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
32523252
// CHECK9-NEXT: entry:
32533253
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
32543254
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3749,7 +3749,7 @@ int main() {
37493749
//
37503750
//
37513751
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3752-
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3752+
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
37533753
// CHECK9-NEXT: entry:
37543754
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
37553755
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -3759,7 +3759,7 @@ int main() {
37593759
//
37603760
//
37613761
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
3762-
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3762+
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
37633763
// CHECK9-NEXT: entry:
37643764
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
37653765
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -3773,7 +3773,7 @@ int main() {
37733773
//
37743774
//
37753775
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3776-
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
3776+
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
37773777
// CHECK9-NEXT: entry:
37783778
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
37793779
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4558,7 +4558,7 @@ int main() {
45584558
//
45594559
//
45604560
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El
4561-
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4561+
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
45624562
// CHECK11-NEXT: entry:
45634563
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
45644564
// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -4571,7 +4571,7 @@ int main() {
45714571
//
45724572
//
45734573
// CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv
4574-
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
4574+
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
45754575
// CHECK11-NEXT: entry:
45764576
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
45774577
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4747,7 +4747,7 @@ int main() {
47474747
//
47484748
//
47494749
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4750-
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 {
4750+
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
47514751
// CHECK11-NEXT: entry:
47524752
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
47534753
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4757,7 +4757,7 @@ int main() {
47574757
//
47584758
//
47594759
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El
4760-
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 {
4760+
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR4]] comdat {
47614761
// CHECK11-NEXT: entry:
47624762
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
47634763
// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -4771,7 +4771,7 @@ int main() {
47714771
//
47724772
//
47734773
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev
4774-
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 {
4774+
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
47754775
// CHECK11-NEXT: entry:
47764776
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
47774777
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -4910,7 +4910,7 @@ int main() {
49104910
//
49114911
//
49124912
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
4913-
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4913+
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
49144914
// CHECK13-NEXT: entry:
49154915
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
49164916
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -4923,7 +4923,7 @@ int main() {
49234923
//
49244924
//
49254925
// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
4926-
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
4926+
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
49274927
// CHECK13-NEXT: entry:
49284928
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
49294929
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -5424,7 +5424,7 @@ int main() {
54245424
//
54255425
//
54265426
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
5427-
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
5427+
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
54285428
// CHECK13-NEXT: entry:
54295429
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
54305430
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
@@ -5434,7 +5434,7 @@ int main() {
54345434
//
54355435
//
54365436
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
5437-
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
5437+
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
54385438
// CHECK13-NEXT: entry:
54395439
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
54405440
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
@@ -6107,7 +6107,7 @@ int main() {
61076107
//
61086108
//
61096109
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
6110-
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
6110+
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
61116111
// CHECK13-NEXT: entry:
61126112
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
61136113
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8

‎llvm/lib/IR/AutoUpgrade.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5406,6 +5406,14 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
54065406
return Res;
54075407
}
54085408

5409+
// AArch64 data layout upgrades.
5410+
if (T.isAArch64()) {
5411+
// Add "-Fn32"
5412+
if (!DL.empty() && !DL.contains("-Fn32"))
5413+
Res.append("-Fn32");
5414+
return Res;
5415+
}
5416+
54095417
if (!T.isX86())
54105418
return Res;
54115419

‎llvm/lib/Target/AArch64/AArch64TargetMachine.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -275,15 +275,15 @@ static std::string computeDataLayout(const Triple &TT,
275275
bool LittleEndian) {
276276
if (TT.isOSBinFormatMachO()) {
277277
if (TT.getArch() == Triple::aarch64_32)
278-
return "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128";
279-
return "e-m:o-i64:64-i128:128-n32:64-S128";
278+
return "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32";
279+
return "e-m:o-i64:64-i128:128-n32:64-S128-Fn32";
280280
}
281281
if (TT.isOSBinFormatCOFF())
282-
return "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128";
282+
return "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32";
283283
std::string Endian = LittleEndian ? "e" : "E";
284284
std::string Ptr32 = TT.getEnvironment() == Triple::GNUILP32 ? "-p:32:32" : "";
285285
return Endian + "-m:e" + Ptr32 +
286-
"-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
286+
"-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32";
287287
}
288288

289289
static StringRef computeDefaultCPU(const Triple &TT, StringRef CPU) {

‎llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
2121
"e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32", "i686-pc-windows-msvc");
2222
std::string DL3 = UpgradeDataLayoutString(
2323
"e-m:o-i64:64-f80:128-n8:16:32:64-S128", "x86_64-apple-macosx");
24+
std::string DL4 =
25+
UpgradeDataLayoutString("e-m:o-i64:64-i128:128-n32:64-S128", "aarch64--");
2426
EXPECT_EQ(DL1,
2527
"e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128"
2628
"-f80:128-n8:16:32:64-S128");
@@ -29,6 +31,7 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) {
2931
"-f80:128-n8:16:32-S32");
3032
EXPECT_EQ(DL3, "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:"
3133
"128-n8:16:32:64-S128");
34+
EXPECT_EQ(DL4, "e-m:o-i64:64-i128:128-n32:64-S128-Fn32");
3235

3336
// Check that AMDGPU targets add -G1 if it's not present.
3437
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "r600"), "e-p:32:32-G1");
@@ -78,15 +81,15 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) {
7881
"x86_64-unknown-linux-gnu");
7982
std::string DL2 = UpgradeDataLayoutString("e-m:e-i64:64-n32:64",
8083
"powerpc64le-unknown-linux-gnu");
81-
std::string DL3 =
82-
UpgradeDataLayoutString("e-m:o-i64:64-i128:128-n32:64-S128", "aarch64--");
84+
std::string DL3 = UpgradeDataLayoutString(
85+
"e-m:o-i64:64-i128:128-n32:64-S128-Fn32", "aarch64--");
8386
EXPECT_EQ(
8487
DL1,
8588
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128"
8689
"-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64"
8790
"-f80:128:128-n8:16:32:64-S128");
8891
EXPECT_EQ(DL2, "e-m:e-i64:64-n32:64");
89-
EXPECT_EQ(DL3, "e-m:o-i64:64-i128:128-n32:64-S128");
92+
EXPECT_EQ(DL3, "e-m:o-i64:64-i128:128-n32:64-S128-Fn32");
9093

9194
// Check that AMDGPU targets don't add -G1 if there is already a -G flag.
9295
EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G2", "r600"), "e-p:32:32-G2");

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