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[InstCombine] Remove foldSelectICmpEq() fold (#122098)
This fold matches complex patterns, for which we have no proof of real-world relevance, and which does not actually handle the originally motivating cases from #71792 either. In #121708 and #121753 we have handled some simpler variants by extending existing folds. I propose to remove this code until we have evidence that it is useful for something.
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2 files changed

+102
-128
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‎llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

Lines changed: 0 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -1842,92 +1842,6 @@ static Instruction *foldSelectICmpEq(SelectInst &SI, ICmpInst *ICI,
18421842
foldSelectWithExtremeEqCond(CmpLHS, CmpRHS, TrueVal, FalseVal))
18431843
return Res;
18441844

1845-
// Transform (X == C) ? X : Y -> (X == C) ? C : Y
1846-
// specific handling for Bitwise operation.
1847-
// x&y -> (x|y) ^ (x^y) or (x|y) & ~(x^y)
1848-
// x|y -> (x&y) | (x^y) or (x&y) ^ (x^y)
1849-
// x^y -> (x|y) ^ (x&y) or (x|y) & ~(x&y)
1850-
Value *X, *Y;
1851-
if (!match(CmpLHS, m_BitwiseLogic(m_Value(X), m_Value(Y))) ||
1852-
!match(TrueVal, m_c_BitwiseLogic(m_Specific(X), m_Specific(Y))))
1853-
return nullptr;
1854-
1855-
const unsigned AndOps = Instruction::And, OrOps = Instruction::Or,
1856-
XorOps = Instruction::Xor, NoOps = 0;
1857-
enum NotMask { None = 0, NotInner, NotRHS };
1858-
1859-
auto matchFalseVal = [&](unsigned OuterOpc, unsigned InnerOpc,
1860-
unsigned NotMask) {
1861-
auto matchInner = m_c_BinOp(InnerOpc, m_Specific(X), m_Specific(Y));
1862-
if (OuterOpc == NoOps)
1863-
return match(CmpRHS, m_Zero()) && match(FalseVal, matchInner);
1864-
1865-
if (NotMask == NotInner) {
1866-
return match(FalseVal, m_c_BinOp(OuterOpc, m_NotForbidPoison(matchInner),
1867-
m_Specific(CmpRHS)));
1868-
} else if (NotMask == NotRHS) {
1869-
return match(FalseVal, m_c_BinOp(OuterOpc, matchInner,
1870-
m_NotForbidPoison(m_Specific(CmpRHS))));
1871-
} else {
1872-
return match(FalseVal,
1873-
m_c_BinOp(OuterOpc, matchInner, m_Specific(CmpRHS)));
1874-
}
1875-
};
1876-
1877-
// (X&Y)==C ? X|Y : X^Y -> (X^Y)|C : X^Y or (X^Y)^ C : X^Y
1878-
// (X&Y)==C ? X^Y : X|Y -> (X|Y)^C : X|Y or (X|Y)&~C : X|Y
1879-
if (match(CmpLHS, m_And(m_Value(X), m_Value(Y)))) {
1880-
if (match(TrueVal, m_c_Or(m_Specific(X), m_Specific(Y)))) {
1881-
// (X&Y)==C ? X|Y : (X^Y)|C -> (X^Y)|C : (X^Y)|C -> (X^Y)|C
1882-
// (X&Y)==C ? X|Y : (X^Y)^C -> (X^Y)^C : (X^Y)^C -> (X^Y)^C
1883-
if (matchFalseVal(OrOps, XorOps, None) ||
1884-
matchFalseVal(XorOps, XorOps, None))
1885-
return IC.replaceInstUsesWith(SI, FalseVal);
1886-
} else if (match(TrueVal, m_c_Xor(m_Specific(X), m_Specific(Y)))) {
1887-
// (X&Y)==C ? X^Y : (X|Y)^ C -> (X|Y)^ C : (X|Y)^ C -> (X|Y)^ C
1888-
// (X&Y)==C ? X^Y : (X|Y)&~C -> (X|Y)&~C : (X|Y)&~C -> (X|Y)&~C
1889-
if (matchFalseVal(XorOps, OrOps, None) ||
1890-
matchFalseVal(AndOps, OrOps, NotRHS))
1891-
return IC.replaceInstUsesWith(SI, FalseVal);
1892-
}
1893-
}
1894-
1895-
// (X|Y)==C ? X&Y : X^Y -> (X^Y)^C : X^Y or ~(X^Y)&C : X^Y
1896-
// (X|Y)==C ? X^Y : X&Y -> (X&Y)^C : X&Y or ~(X&Y)&C : X&Y
1897-
if (match(CmpLHS, m_Or(m_Value(X), m_Value(Y)))) {
1898-
if (match(TrueVal, m_c_And(m_Specific(X), m_Specific(Y)))) {
1899-
// (X|Y)==C ? X&Y: (X^Y)^C -> (X^Y)^C: (X^Y)^C -> (X^Y)^C
1900-
// (X|Y)==C ? X&Y:~(X^Y)&C ->~(X^Y)&C:~(X^Y)&C -> ~(X^Y)&C
1901-
if (matchFalseVal(XorOps, XorOps, None) ||
1902-
matchFalseVal(AndOps, XorOps, NotInner))
1903-
return IC.replaceInstUsesWith(SI, FalseVal);
1904-
} else if (match(TrueVal, m_c_Xor(m_Specific(X), m_Specific(Y)))) {
1905-
// (X|Y)==C ? X^Y : (X&Y)^C -> (X&Y)^C : (X&Y)^C -> (X&Y)^C
1906-
// (X|Y)==C ? X^Y :~(X&Y)&C -> ~(X&Y)&C :~(X&Y)&C -> ~(X&Y)&C
1907-
if (matchFalseVal(XorOps, AndOps, None) ||
1908-
matchFalseVal(AndOps, AndOps, NotInner))
1909-
return IC.replaceInstUsesWith(SI, FalseVal);
1910-
}
1911-
}
1912-
1913-
// (X^Y)==C ? X&Y : X|Y -> (X|Y)^C : X|Y or (X|Y)&~C : X|Y
1914-
// (X^Y)==C ? X|Y : X&Y -> (X&Y)|C : X&Y or (X&Y)^ C : X&Y
1915-
if (match(CmpLHS, m_Xor(m_Value(X), m_Value(Y)))) {
1916-
if ((match(TrueVal, m_c_And(m_Specific(X), m_Specific(Y))))) {
1917-
// (X^Y)==C ? X&Y : (X|Y)^C -> (X|Y)^C
1918-
// (X^Y)==C ? X&Y : (X|Y)&~C -> (X|Y)&~C
1919-
if (matchFalseVal(XorOps, OrOps, None) ||
1920-
matchFalseVal(AndOps, OrOps, NotRHS))
1921-
return IC.replaceInstUsesWith(SI, FalseVal);
1922-
} else if (match(TrueVal, m_c_Or(m_Specific(X), m_Specific(Y)))) {
1923-
// (X^Y)==C ? (X|Y) : (X&Y)|C -> (X&Y)|C
1924-
// (X^Y)==C ? (X|Y) : (X&Y)^C -> (X&Y)^C
1925-
if (matchFalseVal(OrOps, AndOps, None) ||
1926-
matchFalseVal(XorOps, AndOps, None))
1927-
return IC.replaceInstUsesWith(SI, FalseVal);
1928-
}
1929-
}
1930-
19311845
return nullptr;
19321846
}
19331847

‎llvm/test/Transforms/InstCombine/select.ll

Lines changed: 102 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -3841,9 +3841,13 @@ entry:
38413841
define i32 @src_and_eq_C_or_xororC(i32 %x, i32 %y, i32 %c) {
38423842
; CHECK-LABEL: @src_and_eq_C_or_xororC(
38433843
; CHECK-NEXT: entry:
3844-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
3845-
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[XOR]], [[C:%.*]]
3846-
; CHECK-NEXT: ret i32 [[OR1]]
3844+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3845+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3846+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3847+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3848+
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[XOR]], [[C]]
3849+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[OR1]]
3850+
; CHECK-NEXT: ret i32 [[COND]]
38473851
;
38483852
entry:
38493853
%and = and i32 %y, %x
@@ -3858,9 +3862,13 @@ entry:
38583862
define i32 @src_and_eq_C_or_xorxorC(i32 %x, i32 %y, i32 %c) {
38593863
; CHECK-LABEL: @src_and_eq_C_or_xorxorC(
38603864
; CHECK-NEXT: entry:
3861-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
3862-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C:%.*]]
3863-
; CHECK-NEXT: ret i32 [[XOR1]]
3865+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3866+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3867+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3868+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3869+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]]
3870+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR1]]
3871+
; CHECK-NEXT: ret i32 [[COND]]
38643872
;
38653873
entry:
38663874
%and = and i32 %y, %x
@@ -3875,10 +3883,14 @@ entry:
38753883
define i32 @src_and_eq_C_xor_OrAndNotC(i32 %x, i32 %y, i32 %c) {
38763884
; CHECK-LABEL: @src_and_eq_C_xor_OrAndNotC(
38773885
; CHECK-NEXT: entry:
3878-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3879-
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C:%.*]], -1
3886+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3887+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3888+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3889+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3890+
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1
38803891
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[OR]], [[NOT]]
3881-
; CHECK-NEXT: ret i32 [[AND1]]
3892+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[AND1]]
3893+
; CHECK-NEXT: ret i32 [[COND]]
38823894
;
38833895
entry:
38843896
%and = and i32 %y, %x
@@ -3917,9 +3929,13 @@ entry:
39173929
define i32 @src_and_eq_C_xor_orxorC(i32 %x, i32 %y, i32 %c) {
39183930
; CHECK-LABEL: @src_and_eq_C_xor_orxorC(
39193931
; CHECK-NEXT: entry:
3920-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3921-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C:%.*]]
3922-
; CHECK-NEXT: ret i32 [[XOR1]]
3932+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
3933+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]]
3934+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
3935+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
3936+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]]
3937+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[XOR1]]
3938+
; CHECK-NEXT: ret i32 [[COND]]
39233939
;
39243940
entry:
39253941
%and = and i32 %y, %x
@@ -3968,9 +3984,13 @@ entry:
39683984
define i32 @src_or_eq_neg1_and_xor(i32 %x, i32 %y) {
39693985
; CHECK-LABEL: @src_or_eq_neg1_and_xor(
39703986
; CHECK-NEXT: entry:
3971-
; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
3987+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
3988+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1
3989+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
3990+
; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]]
39723991
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[TMP0]], -1
3973-
; CHECK-NEXT: ret i32 [[NOT]]
3992+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[NOT]]
3993+
; CHECK-NEXT: ret i32 [[COND]]
39743994
;
39753995
entry:
39763996
%or = or i32 %y, %x
@@ -3985,9 +4005,13 @@ entry:
39854005
define i32 @src_or_eq_neg1_xor_and(i32 %x, i32 %y) {
39864006
; CHECK-LABEL: @src_or_eq_neg1_xor_and(
39874007
; CHECK-NEXT: entry:
3988-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4008+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4009+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1
4010+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4011+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
39894012
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[AND]], -1
3990-
; CHECK-NEXT: ret i32 [[NOT]]
4013+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[NOT]]
4014+
; CHECK-NEXT: ret i32 [[COND]]
39914015
;
39924016
entry:
39934017
%or = or i32 %y, %x
@@ -4002,9 +4026,13 @@ entry:
40024026
define i32 @src_or_eq_C_and_xorC(i32 %x, i32 %y, i32 %c) {
40034027
; CHECK-LABEL: @src_or_eq_C_and_xorC(
40044028
; CHECK-NEXT: entry:
4005-
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4006-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C:%.*]]
4007-
; CHECK-NEXT: ret i32 [[XOR1]]
4029+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4030+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4031+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4032+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4033+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]]
4034+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[XOR1]]
4035+
; CHECK-NEXT: ret i32 [[COND]]
40084036
;
40094037
entry:
40104038
%or = or i32 %y, %x
@@ -4019,10 +4047,14 @@ entry:
40194047
define i32 @src_or_eq_C_and_andnotxorC(i32 %x, i32 %y, i32 %c) {
40204048
; CHECK-LABEL: @src_or_eq_C_and_andnotxorC(
40214049
; CHECK-NEXT: entry:
4022-
; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
4050+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4051+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4052+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4053+
; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]]
40234054
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[TMP0]], -1
4024-
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C:%.*]], [[NOT]]
4025-
; CHECK-NEXT: ret i32 [[AND1]]
4055+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C]], [[NOT]]
4056+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[AND1]]
4057+
; CHECK-NEXT: ret i32 [[COND]]
40264058
;
40274059
entry:
40284060
%or = or i32 %y, %x
@@ -4038,9 +4070,13 @@ entry:
40384070
define i32 @src_or_eq_C_xor_xorandC(i32 %x, i32 %y, i32 %c) {
40394071
; CHECK-LABEL: @src_or_eq_C_xor_xorandC(
40404072
; CHECK-NEXT: entry:
4041-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4042-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C:%.*]]
4043-
; CHECK-NEXT: ret i32 [[XOR1]]
4073+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4074+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4075+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4076+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4077+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]]
4078+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[XOR1]]
4079+
; CHECK-NEXT: ret i32 [[COND]]
40444080
;
40454081
entry:
40464082
%or = or i32 %y, %x
@@ -4055,10 +4091,14 @@ entry:
40554091
define i32 @src_or_eq_C_xor_andnotandC(i32 %x, i32 %y, i32 %c) {
40564092
; CHECK-LABEL: @src_or_eq_C_xor_andnotandC(
40574093
; CHECK-NEXT: entry:
4058-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4094+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4095+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]]
4096+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]]
4097+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
40594098
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[AND]], -1
4060-
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C:%.*]], [[NOT]]
4061-
; CHECK-NEXT: ret i32 [[AND1]]
4099+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[C]], [[NOT]]
4100+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[XOR]], i32 [[AND1]]
4101+
; CHECK-NEXT: ret i32 [[COND]]
40624102
;
40634103
entry:
40644104
%or = or i32 %y, %x
@@ -4076,9 +4116,13 @@ entry:
40764116
define i32 @src_xor_eq_neg1_and(i32 %x, i32 %y) {
40774117
; CHECK-LABEL: @src_xor_eq_neg1_and(
40784118
; CHECK-NEXT: entry:
4079-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4119+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4120+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], -1
4121+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4122+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
40804123
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[OR]], -1
4081-
; CHECK-NEXT: ret i32 [[NOT]]
4124+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[NOT]]
4125+
; CHECK-NEXT: ret i32 [[COND]]
40824126
;
40834127
entry:
40844128
%xor = xor i32 %y, %x
@@ -4111,9 +4155,13 @@ entry:
41114155
define i32 @src_xor_eq_C_and_xororC(i32 %x, i32 %y, i32 %c) {
41124156
; CHECK-LABEL: @src_xor_eq_C_and_xororC(
41134157
; CHECK-NEXT: entry:
4114-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4115-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C:%.*]]
4116-
; CHECK-NEXT: ret i32 [[XOR1]]
4158+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4159+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4160+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4161+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4162+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]]
4163+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[XOR1]]
4164+
; CHECK-NEXT: ret i32 [[COND]]
41174165
;
41184166
entry:
41194167
%xor = xor i32 %y, %x
@@ -4128,10 +4176,14 @@ entry:
41284176
define i32 @src_xor_eq_C_and_andornotC(i32 %x, i32 %y, i32 %c) {
41294177
; CHECK-LABEL: @src_xor_eq_C_and_andornotC(
41304178
; CHECK-NEXT: entry:
4131-
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
4132-
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C:%.*]], -1
4179+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4180+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4181+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4182+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4183+
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1
41334184
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[OR]], [[NOT]]
4134-
; CHECK-NEXT: ret i32 [[AND1]]
4185+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 [[AND1]]
4186+
; CHECK-NEXT: ret i32 [[COND]]
41354187
;
41364188
entry:
41374189
%xor = xor i32 %y, %x
@@ -4147,9 +4199,13 @@ entry:
41474199
define i32 @src_xor_eq_C_or_xorandC(i32 %x, i32 %y, i32 %c) {
41484200
; CHECK-LABEL: @src_xor_eq_C_or_xorandC(
41494201
; CHECK-NEXT: entry:
4150-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4151-
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C:%.*]]
4152-
; CHECK-NEXT: ret i32 [[XOR1]]
4202+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4203+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4204+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4205+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4206+
; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]]
4207+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[XOR1]]
4208+
; CHECK-NEXT: ret i32 [[COND]]
41534209
;
41544210
entry:
41554211
%xor = xor i32 %y, %x
@@ -4164,9 +4220,13 @@ entry:
41644220
define i32 @src_xor_eq_C_or_orandC(i32 %x, i32 %y, i32 %c) {
41654221
; CHECK-LABEL: @src_xor_eq_C_or_orandC(
41664222
; CHECK-NEXT: entry:
4167-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
4168-
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[AND]], [[C:%.*]]
4169-
; CHECK-NEXT: ret i32 [[OR1]]
4223+
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
4224+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]]
4225+
; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]]
4226+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]]
4227+
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[AND]], [[C]]
4228+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 [[OR1]]
4229+
; CHECK-NEXT: ret i32 [[COND]]
41704230
;
41714231
entry:
41724232
%xor = xor i32 %y, %x

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