[AMDGPU] Remove redundand check in the SILoadStoreOptimizer

rampitec · rampitec · commit dc0981562e52 · 2022-02-21T15:04:44.000-08:00
Differential Revision: https://reviews.llvm.org/D120268
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -747,8 +747,7 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI,
   if ((CI.InstClass != DS_READ) && (CI.InstClass != DS_WRITE)) {
     return (EltOffset0 + CI.Width == EltOffset1 ||
             EltOffset1 + Paired.Width == EltOffset0) &&
-           CI.CPol == Paired.CPol &&
-           (CI.InstClass == S_BUFFER_LOAD_IMM || CI.CPol == Paired.CPol);
+           CI.CPol == Paired.CPol;
   }
 
   // If the offset in elements doesn't fit in 8-bits, we might be able to use

Original file line number	Diff line number	Diff line change
`@@ -747,8 +747,7 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI,`
`747`	`747`	`if ((CI.InstClass != DS_READ) && (CI.InstClass != DS_WRITE)) {`
`748`	`748`	`return (EltOffset0 + CI.Width == EltOffset1 \|\|`
`749`	`749`	`EltOffset1 + Paired.Width == EltOffset0) &&`
`750`		`- CI.CPol == Paired.CPol &&`
`751`		`- (CI.InstClass == S_BUFFER_LOAD_IMM \|\| CI.CPol == Paired.CPol);`
	`750`	`+ CI.CPol == Paired.CPol;`
`752`	`751`	`}`
`753`	`752`
`754`	`753`	`// If the offset in elements doesn't fit in 8-bits, we might be able to use`