[RISCV] update ctlz-sdnode.ll test

Author: sun-jacobi

llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll

@@ -1234,8 +1234,8 @@ define <vscale x 1 x i64> @ctlz_nxv1i64(<vscale x 1 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v9, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v10, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v10, 23
 ; CHECK-F-NEXT:    vwsubu.wv v9, v9, v8
@@ -1375,8 +1375,8 @@ define <vscale x 2 x i64> @ctlz_nxv2i64(<vscale x 2 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v10, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v12, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v12, 23
 ; CHECK-F-NEXT:    vwsubu.wv v10, v10, v8
@@ -1516,8 +1516,8 @@ define <vscale x 4 x i64> @ctlz_nxv4i64(<vscale x 4 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v12, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v16, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v16, 23
 ; CHECK-F-NEXT:    vwsubu.wv v12, v12, v8
@@ -1657,8 +1657,8 @@ define <vscale x 8 x i64> @ctlz_nxv8i64(<vscale x 8 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v16, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v24, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v24, 23
 ; CHECK-F-NEXT:    vwsubu.wv v16, v16, v8
@@ -2840,8 +2840,8 @@ define <vscale x 1 x i64> @ctlz_zero_undef_nxv1i64(<vscale x 1 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v9, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, mf2, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v10, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v10, 23
 ; CHECK-F-NEXT:    vwsubu.wv v9, v9, v8
@@ -2976,8 +2976,8 @@ define <vscale x 2 x i64> @ctlz_zero_undef_nxv2i64(<vscale x 2 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v10, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m1, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v12, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v12, 23
 ; CHECK-F-NEXT:    vwsubu.wv v10, v10, v8
@@ -3112,8 +3112,8 @@ define <vscale x 4 x i64> @ctlz_zero_undef_nxv4i64(<vscale x 4 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v12, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m2, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v16, v8
 ; CHECK-F-NEXT:    vsrl.vi v8, v16, 23
 ; CHECK-F-NEXT:    vwsubu.wv v12, v12, v8
@@ -3249,8 +3249,8 @@ define <vscale x 8 x i64> @ctlz_zero_undef_nxv8i64(<vscale x 8 x i64> %va) {
 ; CHECK-F-NEXT:    li a0, 190
 ; CHECK-F-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
 ; CHECK-F-NEXT:    vmv.v.x v8, a0
-; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vsetvli zero, zero, e32, m4, ta, ma
+; CHECK-F-NEXT:    fsrmi a0, 1
 ; CHECK-F-NEXT:    vfncvt.f.xu.w v24, v16
 ; CHECK-F-NEXT:    vsrl.vi v16, v24, 23
 ; CHECK-F-NEXT:    vwsubu.wv v8, v8, v16