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[RISCV] Give ZEXT_H_RV32 and ZEXT_H_RV64 R-type format to match PACK. NFC
These are different than other Zb* unary instructions because they are specializations of PACKW or PACKH. So they should use RVInstR instead of RVInstI. This doesn't cause any functional difference since we only use the format for relocations and we never have relocations on these instructions.
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llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -224,6 +224,14 @@ def sh3add_uw_op : ComplexPattern<XLenVT, 1, "selectSHXADD_UWOp<3>", [], [], 6>;
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// Instruction class templates
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//===----------------------------------------------------------------------===//
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class RVBUnaryR<bits<7> funct7, bits<3> funct3,
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RISCVOpcode opcode, string opcodestr>
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: RVInstR<funct7, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
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opcodestr, "$rd, $rs1"> {
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let rs2 = 0;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class RVBUnary<bits<12> imm12, bits<3> funct3,
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RISCVOpcode opcode, string opcodestr>
@@ -392,12 +400,12 @@ def PACKW : ALUW_rr<0b0000100, 0b100, "packw">,
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Sched<[WritePACK32, ReadPACK32, ReadPACK32]>;
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let Predicates = [HasStdExtZbb, IsRV32] in {
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def ZEXT_H_RV32 : RVBUnary<0b000010000000, 0b100, OPC_OP, "zext.h">,
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def ZEXT_H_RV32 : RVBUnaryR<0b0000100, 0b100, OPC_OP, "zext.h">,
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Sched<[WriteIALU, ReadIALU]>;
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} // Predicates = [HasStdExtZbb, IsRV32]
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let Predicates = [HasStdExtZbb, IsRV64], IsSignExtendingOpW = 1 in {
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def ZEXT_H_RV64 : RVBUnary<0b000010000000, 0b100, OPC_OP_32, "zext.h">,
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def ZEXT_H_RV64 : RVBUnaryR<0b0000100, 0b100, OPC_OP_32, "zext.h">,
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Sched<[WriteIALU, ReadIALU]>;
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} // Predicates = [HasStdExtZbb, IsRV64]
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