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llvm/test/CodeGen/PowerPC Expand file tree Collapse file tree 4 files changed +8
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lines changed Original file line number Diff line number Diff line change 1
- ; FIXME: FastISel currently returns false if it hits code that uses VSX
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- ; registers and with -fast-isel-abort=1 turned on the test case will then fail.
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- ; When fastisel better supports VSX fix up this test case.
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- ;
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- ; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -mattr=-vsx -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
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+ ; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
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define i32 @t1 (i8 signext %a ) nounwind {
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%1 = sext i8 %a to i32
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- ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
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+ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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define zeroext i1 @testi1 (i8 %in ) nounwind {
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entry:
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- ; FIXME: FastISel currently returns false if it hits code that uses VSX
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- ; registers and with -fast-isel-abort=1 turned on the test case will then fail.
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- ; When fastisel better supports VSX fix up this test case.
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- ;
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; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=-vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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+ ; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=VSX
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; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=spe -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=SPE
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; This test verifies that load/store instructions are properly generated,
@@ -78,9 +75,11 @@ define double @t6() nounwind {
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; SPE: t6
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%1 = load double , double * @f , align 8
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; ELF64: lfd
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+ ; VSX: lxsdx
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; SPE: evldd
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%2 = fadd double %1 , 1 .0
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; ELF64: fadd
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+ ; VSX: xsadddp
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; SPE: efdadd
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ret double %2
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}
@@ -150,6 +149,8 @@ define void @t12(double %v) nounwind {
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store double %1 , double * @f , align 8
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; ELF64: fadd
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; ELF64: stfd
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+ ; VSX: xsadddp
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+ ; VSX: stxsdx
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; SPE: efdadd
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; SPE: evstdd
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ret void
Original file line number Diff line number Diff line change 1
- ; FIXME: FastISel currently returns false if it hits code that uses VSX
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- ; registers and with -fast-isel-abort=1 turned on the test case will then fail.
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- ; When fastisel better supports VSX fix up this test case.
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- ;
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- ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
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+ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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define zeroext i1 @rettrue () nounwind {
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entry:
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