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[CodeGen][NewPM] Port OptimizePHIs to NPM (#113433)
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-35
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13 files changed

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//===- llvm/CodeGen/OptimizePHIs.h -----------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_OPTIMIZE_PHIS_H
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#define LLVM_CODEGEN_OPTIMIZE_PHIS_H
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#include "llvm/CodeGen/MachinePassManager.h"
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namespace llvm {
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class OptimizePHIsPass : public PassInfoMixin<OptimizePHIsPass> {
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public:
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
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};
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} // namespace llvm
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#endif // LLVM_CODEGEN_OPTIMIZE_PHIS_H

llvm/include/llvm/CodeGen/Passes.h

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@@ -367,7 +367,7 @@ namespace llvm {
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/// OptimizePHIs - This pass optimizes machine instruction PHIs
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/// to take advantage of opportunities created during DAG legalization.
370-
extern char &OptimizePHIsID;
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extern char &OptimizePHIsLegacyID;
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/// StackSlotColoring - This pass performs stack slot coloring.
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extern char &StackSlotColoringID;

llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
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@@ -221,7 +221,7 @@ void initializeModuloScheduleTestPass(PassRegistry &);
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void initializeNaryReassociateLegacyPassPass(PassRegistry &);
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void initializeObjCARCContractLegacyPassPass(PassRegistry &);
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void initializeOptimizationRemarkEmitterWrapperPassPass(PassRegistry &);
224-
void initializeOptimizePHIsPass(PassRegistry &);
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void initializeOptimizePHIsLegacyPass(PassRegistry &);
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void initializePEIPass(PassRegistry &);
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void initializePHIEliminationPass(PassRegistry &);
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void initializePartiallyInlineLibCallsLegacyPassPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

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@@ -49,6 +49,7 @@
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachinePassManager.h"
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#include "llvm/CodeGen/MachineVerifier.h"
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#include "llvm/CodeGen/OptimizePHIs.h"
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#include "llvm/CodeGen/PHIElimination.h"
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#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
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#include "llvm/CodeGen/RegAllocFast.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 1 addition & 1 deletion
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@@ -138,6 +138,7 @@ MACHINE_FUNCTION_PASS("localstackalloc", LocalStackSlotAllocationPass())
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MACHINE_FUNCTION_PASS("machine-cse", MachineCSEPass())
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MACHINE_FUNCTION_PASS("machinelicm", MachineLICMPass())
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MACHINE_FUNCTION_PASS("no-op-machine-function", NoOpMachineFunctionPass())
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MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass())
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MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
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MACHINE_FUNCTION_PASS("print", PrintMIRPass())
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MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(dbgs()))
@@ -233,7 +234,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machine-sink", MachineSinkingPass)
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DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
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DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
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DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
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DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass)
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DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
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DUMMY_MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass)
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DUMMY_MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass)

llvm/lib/CodeGen/CodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeMachineUniformityInfoPrinterPassPass(Registry);
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initializeMachineVerifierLegacyPassPass(Registry);
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initializeObjCARCContractLegacyPassPass(Registry);
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initializeOptimizePHIsPass(Registry);
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initializeOptimizePHIsLegacyPass(Registry);
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initializePEIPass(Registry);
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initializePHIEliminationPass(Registry);
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initializePatchableFunctionPass(Registry);

llvm/lib/CodeGen/OptimizePHIs.cpp

Lines changed: 48 additions & 29 deletions
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@@ -11,15 +11,16 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/OptimizePHIs.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/Function.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include <cassert>
@@ -33,47 +34,65 @@ STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");
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namespace {
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36-
class OptimizePHIs : public MachineFunctionPass {
37-
MachineRegisterInfo *MRI = nullptr;
38-
const TargetInstrInfo *TII = nullptr;
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class OptimizePHIs {
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MachineRegisterInfo *MRI = nullptr;
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const TargetInstrInfo *TII = nullptr;
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public:
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static char ID; // Pass identification
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public:
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bool run(MachineFunction &Fn);
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43-
OptimizePHIs() : MachineFunctionPass(ID) {
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initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &Fn) override;
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private:
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using InstrSet = SmallPtrSet<MachineInstr *, 16>;
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using InstrSetIterator = SmallPtrSetIterator<MachineInstr *>;
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49-
void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
51-
MachineFunctionPass::getAnalysisUsage(AU);
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}
48+
bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,
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InstrSet &PHIsInCycle);
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bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);
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bool OptimizeBB(MachineBasicBlock &MBB);
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};
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private:
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using InstrSet = SmallPtrSet<MachineInstr *, 16>;
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using InstrSetIterator = SmallPtrSetIterator<MachineInstr *>;
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class OptimizePHIsLegacy : public MachineFunctionPass {
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public:
56+
static char ID;
57+
OptimizePHIsLegacy() : MachineFunctionPass(ID) {
58+
initializeOptimizePHIsLegacyPass(*PassRegistry::getPassRegistry());
59+
}
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58-
bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,
59-
InstrSet &PHIsInCycle);
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bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);
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bool OptimizeBB(MachineBasicBlock &MBB);
62-
};
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bool runOnMachineFunction(MachineFunction &MF) override {
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if (skipFunction(MF.getFunction()))
63+
return false;
64+
OptimizePHIs OP;
65+
return OP.run(MF);
66+
}
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68+
void getAnalysisUsage(AnalysisUsage &AU) const override {
69+
AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
72+
};
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} // end anonymous namespace
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66-
char OptimizePHIs::ID = 0;
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char OptimizePHIsLegacy::ID = 0;
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68-
char &llvm::OptimizePHIsID = OptimizePHIs::ID;
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char &llvm::OptimizePHIsLegacyID = OptimizePHIsLegacy::ID;
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70-
INITIALIZE_PASS(OptimizePHIs, DEBUG_TYPE,
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INITIALIZE_PASS(OptimizePHIsLegacy, DEBUG_TYPE,
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"Optimize machine instruction PHIs", false, false)
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73-
bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
74-
if (skipFunction(Fn.getFunction()))
75-
return false;
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PreservedAnalyses OptimizePHIsPass::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM) {
84+
if (MF.getFunction().hasOptNone())
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return PreservedAnalyses::all();
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87+
OptimizePHIs OP;
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if (!OP.run(MF))
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return PreservedAnalyses::all();
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auto PA = getMachineFunctionPassPreservedAnalyses();
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PA.preserveSet<CFGAnalyses>();
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return PA;
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}
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bool OptimizePHIs::run(MachineFunction &Fn) {
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MRI = &Fn.getRegInfo();
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TII = Fn.getSubtarget().getInstrInfo();
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llvm/lib/CodeGen/TargetPassConfig.cpp

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@@ -1283,7 +1283,7 @@ void TargetPassConfig::addMachineSSAOptimization() {
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// Optimize PHIs before DCE: removing dead PHI cycles may make more
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// instructions dead.
1286-
addPass(&OptimizePHIsID);
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addPass(&OptimizePHIsLegacyID);
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// This pass merges large allocas. StackSlotColoring is a different pass
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// which merges spill slots.

llvm/lib/Passes/PassBuilder.cpp

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@@ -114,6 +114,7 @@
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineTraceMetrics.h"
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#include "llvm/CodeGen/MachineVerifier.h"
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#include "llvm/CodeGen/OptimizePHIs.h"
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#include "llvm/CodeGen/PHIElimination.h"
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#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
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#include "llvm/CodeGen/RegAllocFast.h"

llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp

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@@ -441,7 +441,7 @@ void NVPTXPassConfig::addMachineSSAOptimization() {
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// Optimize PHIs before DCE: removing dead PHI cycles may make more
443443
// instructions dead.
444-
addPass(&OptimizePHIsID);
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addPass(&OptimizePHIsLegacyID);
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// This pass merges large allocas. StackSlotColoring is a different pass
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// which merges spill slots.

llvm/test/CodeGen/Thumb/opt-phis.mir

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@@ -1,4 +1,5 @@
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# RUN: llc -mtriple thumbv6m-none-eabi -run-pass=opt-phis -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -mtriple thumbv6m-none-eabi -passes=opt-phis -verify-machineinstrs -o - %s | FileCheck %s
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--- |
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv6m-arm-none-eabi"

llvm/test/CodeGen/X86/opt_phis.mir

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@@ -1,4 +1,5 @@
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# RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
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# RUN: llc -passes opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
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--- |
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define void @test() {
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ret void

llvm/test/CodeGen/X86/opt_phis2.mir

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@@ -1,4 +1,5 @@
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# RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
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# RUN: llc -passes opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
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# All PHIs should be removed since they can be securely replaced
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# by %8 register.
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# CHECK-NOT: PHI

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