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90 | 90 | // CUDA-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3 |
91 | 91 | // CUDA-NEXT: %flags = load i32, ptr %4, align 4 |
92 | 92 | // CUDA-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4 |
93 | | -// CUDA-NEXT: %textype = load i32, ptr %4, align 4 |
| 93 | +// CUDA-NEXT: %textype = load i32, ptr %5, align 4 |
94 | 94 | // CUDA-NEXT: %type = and i32 %flags, 7 |
95 | 95 | // CUDA-NEXT: %6 = and i32 %flags, 8 |
96 | 96 | // CUDA-NEXT: %extern = lshr i32 %6, 3 |
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189 | 189 | // HIP-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3 |
190 | 190 | // HIP-NEXT: %flags = load i32, ptr %4, align 4 |
191 | 191 | // HIP-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4 |
192 | | -// HIP-NEXT: %textype = load i32, ptr %4, align 4 |
| 192 | +// HIP-NEXT: %textype = load i32, ptr %5, align 4 |
193 | 193 | // HIP-NEXT: %type = and i32 %flags, 7 |
194 | 194 | // HIP-NEXT: %6 = and i32 %flags, 8 |
195 | 195 | // HIP-NEXT: %extern = lshr i32 %6, 3 |
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