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[flang][debug] Support fir.vector type.
1 parent 7fc3491 commit adceba0

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3 files changed

+54
-0
lines changed

3 files changed

+54
-0
lines changed

flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -401,6 +401,31 @@ mlir::LLVM::DITypeAttr DebugTypeGenerator::convertSequenceType(
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/*associated=*/nullptr);
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}
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mlir::LLVM::DITypeAttr DebugTypeGenerator::convertVectorType(
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fir::VectorType vecTy, mlir::LLVM::DIFileAttr fileAttr,
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mlir::LLVM::DIScopeAttr scope, fir::cg::XDeclareOp declOp) {
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mlir::MLIRContext *context = module.getContext();
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llvm::SmallVector<mlir::LLVM::DINodeAttr> elements;
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mlir::LLVM::DITypeAttr elemTy =
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convertType(vecTy.getEleTy(), fileAttr, scope, declOp);
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auto intTy = mlir::IntegerType::get(context, 64);
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auto countAttr =
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mlir::IntegerAttr::get(intTy, llvm::APInt(64, vecTy.getLen()));
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auto subrangeTy = mlir::LLVM::DISubrangeAttr::get(
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context, countAttr, /*lowerBound=*/nullptr, /*upperBound=*/nullptr,
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/*stride=*/nullptr);
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elements.push_back(subrangeTy);
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mlir::Type llvmTy = llvmTypeConverter.convertType(vecTy.getEleTy());
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uint64_t sizeInBits = dataLayout->getTypeSize(llvmTy) * vecTy.getLen() * 8;
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return mlir::LLVM::DICompositeTypeAttr::get(
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context, llvm::dwarf::DW_TAG_array_type, /*name=*/nullptr,
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/*file=*/nullptr, /*line=*/0, /*scope=*/nullptr, elemTy,
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mlir::LLVM::DIFlags::Vector, sizeInBits, /*alignInBits=*/0, elements,
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/*dataLocation=*/nullptr, /*rank=*/nullptr, /*allocated=*/nullptr,
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/*associated=*/nullptr);
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}
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mlir::LLVM::DITypeAttr DebugTypeGenerator::convertCharacterType(
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fir::CharacterType charTy, mlir::LLVM::DIFileAttr fileAttr,
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mlir::LLVM::DIScopeAttr scope, fir::cg::XDeclareOp declOp,
@@ -511,6 +536,8 @@ DebugTypeGenerator::convertType(mlir::Type Ty, mlir::LLVM::DIFileAttr fileAttr,
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/*hasDescriptor=*/false);
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} else if (auto recTy = mlir::dyn_cast_or_null<fir::RecordType>(Ty)) {
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return convertRecordType(recTy, fileAttr, scope, declOp);
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} else if (auto vecTy = mlir::dyn_cast_or_null<fir::VectorType>(Ty)) {
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return convertVectorType(vecTy, fileAttr, scope, declOp);
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} else if (auto boxTy = mlir::dyn_cast_or_null<fir::BoxType>(Ty)) {
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auto elTy = boxTy.getElementType();
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if (auto seqTy = mlir::dyn_cast_or_null<fir::SequenceType>(elTy))

flang/lib/Optimizer/Transforms/DebugTypeGenerator.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,10 @@ class DebugTypeGenerator {
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mlir::LLVM::DIFileAttr fileAttr,
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mlir::LLVM::DIScopeAttr scope,
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fir::cg::XDeclareOp declOp);
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mlir::LLVM::DITypeAttr convertVectorType(fir::VectorType vecTy,
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mlir::LLVM::DIFileAttr fileAttr,
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mlir::LLVM::DIScopeAttr scope,
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fir::cg::XDeclareOp declOp);
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/// The 'genAllocated' is true when we want to generate 'allocated' field
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/// in the DICompositeType. It is needed for the allocatable arrays.
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
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// RUN: fir-opt --add-debug-info --mlir-print-debuginfo %s | FileCheck %s
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module attributes {dlti.dl_spec = #dlti.dl_spec<>} {
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func.func private @foo1(%arg0: !fir.vector<20:bf16>)
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// CHECK-DAG: #[[F16:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "real", sizeInBits = 16, encoding = DW_ATE_float>
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// CHECK-DAG: #llvm.di_composite_type<tag = DW_TAG_array_type, baseType = #[[F16]], flags = Vector, sizeInBits = 320, elements = #llvm.di_subrange<count = 20 : i64>>
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func.func private @foo2(%arg0: !fir.vector<30:f32>)
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// CHECK-DAG: #[[F32:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "real", sizeInBits = 32, encoding = DW_ATE_float>
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// CHECK-DAG: #llvm.di_composite_type<tag = DW_TAG_array_type, baseType = #[[F32]], flags = Vector, sizeInBits = 960, elements = #llvm.di_subrange<count = 30 : i64>>
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func.func private @foo3(%arg0: !fir.vector<10:f64>)
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// CHECK-DAG: #[[F64:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "real", sizeInBits = 64, encoding = DW_ATE_float>
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// CHECK-DAG: #llvm.di_composite_type<tag = DW_TAG_array_type, baseType = #[[F64]], flags = Vector, sizeInBits = 640, elements = #llvm.di_subrange<count = 10 : i64>>
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func.func private @foo4(%arg0: !fir.vector<5:i32>)
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// CHECK-DAG: #[[I32:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "integer", sizeInBits = 32, encoding = DW_ATE_signed>
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// CHECK-DAG: #llvm.di_composite_type<tag = DW_TAG_array_type, baseType = #[[I32]], flags = Vector, sizeInBits = 160, elements = #llvm.di_subrange<count = 5 : i64>>
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func.func private @foo5(%arg0: !fir.vector<2:i64>)
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// CHECK-DAG: #[[I64:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "integer", sizeInBits = 64, encoding = DW_ATE_signed>
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// CHECK-DAG: #llvm.di_composite_type<tag = DW_TAG_array_type, baseType = #[[I64]], flags = Vector, sizeInBits = 128, elements = #llvm.di_subrange<count = 2 : i64>>
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}

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