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[AArch64] Implement TRBMPAM_EL1 system register (#102485)
Implement TRBMPAM_EL1 system register, which was noticed to be missing
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llvm/lib/Target/AArch64/AArch64SystemOperands.td

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Original file line numberDiff line numberDiff line change
@@ -1669,6 +1669,7 @@ def : RWSysReg<"TRBPTR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b001>;
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def : RWSysReg<"TRBBASER_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b010>;
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def : RWSysReg<"TRBSR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b011>;
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def : RWSysReg<"TRBMAR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b100>;
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def : RWSysReg<"TRBMPAM_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b101>;
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def : RWSysReg<"TRBTRG_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b110>;
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def : ROSysReg<"TRBIDR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b111>;
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} // FeatureTRBE

llvm/test/MC/AArch64/trbe-sysreg.s

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@@ -8,6 +8,7 @@ mrs x0, TRBPTR_EL1
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mrs x0, TRBBASER_EL1
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mrs x0, TRBSR_EL1
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mrs x0, TRBMAR_EL1
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mrs x0, TRBMPAM_EL1
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mrs x0, TRBTRG_EL1
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mrs x0, TRBIDR_EL1
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@@ -16,6 +17,7 @@ mrs x0, TRBIDR_EL1
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// CHECK: mrs x0, TRBBASER_EL1 // encoding: [0x40,0x9b,0x38,0xd5]
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// CHECK: mrs x0, TRBSR_EL1 // encoding: [0x60,0x9b,0x38,0xd5]
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// CHECK: mrs x0, TRBMAR_EL1 // encoding: [0x80,0x9b,0x38,0xd5]
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// CHECK: mrs x0, TRBMPAM_EL1 // encoding: [0xa0,0x9b,0x38,0xd5]
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// CHECK: mrs x0, TRBTRG_EL1 // encoding: [0xc0,0x9b,0x38,0xd5]
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// CHECK: mrs x0, TRBIDR_EL1 // encoding: [0xe0,0x9b,0x38,0xd5]
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@@ -25,11 +27,13 @@ msr TRBPTR_EL1, x0
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msr TRBBASER_EL1, x0
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msr TRBSR_EL1, x0
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msr TRBMAR_EL1, x0
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msr TRBMPAM_EL1, x0
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msr TRBTRG_EL1, x0
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// CHECK: msr TRBLIMITR_EL1, x0 // encoding: [0x00,0x9b,0x18,0xd5]
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// CHECK: msr TRBPTR_EL1, x0 // encoding: [0x20,0x9b,0x18,0xd5]
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// CHECK: msr TRBBASER_EL1, x0 // encoding: [0x40,0x9b,0x18,0xd5]
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// CHECK: msr TRBSR_EL1, x0 // encoding: [0x60,0x9b,0x18,0xd5]
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// CHECK: msr TRBMAR_EL1, x0 // encoding: [0x80,0x9b,0x18,0xd5]
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// CHECK: msr TRBMPAM_EL1, x0 // encoding: [0xa0,0x9b,0x18,0xd5]
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// CHECK: msr TRBTRG_EL1, x0 // encoding: [0xc0,0x9b,0x18,0xd5]

llvm/test/MC/Disassembler/AArch64/trbe.txt

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
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[0x40,0x9b,0x38,0xd5]
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[0x60,0x9b,0x38,0xd5]
1010
[0x80,0x9b,0x38,0xd5]
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[0xa0,0x9b,0x38,0xd5]
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[0xc0,0x9b,0x38,0xd5]
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[0xe0,0x9b,0x38,0xd5]
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@@ -16,6 +17,7 @@
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# CHECK: mrs x0, TRBBASER_EL1
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# CHECK: mrs x0, TRBSR_EL1
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# CHECK: mrs x0, TRBMAR_EL1
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# CHECK: mrs x0, TRBMPAM_EL1
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# CHECK: mrs x0, TRBTRG_EL1
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# CHECK: mrs x0, TRBIDR_EL1
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@@ -25,11 +27,13 @@
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[0x40,0x9b,0x18,0xd5]
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[0x60,0x9b,0x18,0xd5]
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[0x80,0x9b,0x18,0xd5]
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[0xa0,0x9b,0x18,0xd5]
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[0xc0,0x9b,0x18,0xd5]
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# CHECK: msr TRBLIMITR_EL1, x0
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# CHECK: msr TRBPTR_EL1, x0
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# CHECK: msr TRBBASER_EL1, x0
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# CHECK: msr TRBSR_EL1, x0
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# CHECK: msr TRBMAR_EL1, x0
38+
# CHECK: msr TRBMPAM_EL1, x0
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# CHECK: msr TRBTRG_EL1, x0

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