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[RISCV] Relax vslide*_vl patterns to allow any mask. NFC (#68203)
We were previously only matching on the true_mask pattern. This patch allows arbitrary masks to be matched, which means we can avoid the workaround used in #66267. We can just add patterns for the _MASK pseudo variants because RISCVDAGToDAGISel::doPeepholeMaskedRVV will transform them to the unmasked variant if the mask is all ones.
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llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

Lines changed: 56 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -2045,6 +2045,56 @@ multiclass VPatWidenFPMulAccVL_VV_VF_RM<SDNode vop, string instruction_name> {
20452045
}
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}
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2048+
multiclass VPatSlideVL_VX_VI<SDNode vop, string instruction_name> {
2049+
foreach vti = AllVectors in {
2050+
let Predicates = GetVTypePredicates<vti>.Predicates in {
2051+
def : Pat<(vti.Vector (vop (vti.Vector vti.RegClass:$rd),
2052+
(vti.Vector vti.RegClass:$rs1),
2053+
uimm5:$rs2, (vti.Mask V0),
2054+
VLOpFrag, (XLenVT timm:$policy))),
2055+
(!cast<Instruction>(instruction_name#"_VI_"#vti.LMul.MX#"_MASK")
2056+
vti.RegClass:$rd, vti.RegClass:$rs1, uimm5:$rs2,
2057+
(vti.Mask V0), GPR:$vl, vti.Log2SEW,
2058+
(XLenVT timm:$policy))>;
2059+
2060+
def : Pat<(vti.Vector (vop (vti.Vector vti.RegClass:$rd),
2061+
(vti.Vector vti.RegClass:$rs1),
2062+
GPR:$rs2, (vti.Mask V0),
2063+
VLOpFrag, (XLenVT timm:$policy))),
2064+
(!cast<Instruction>(instruction_name#"_VX_"#vti.LMul.MX#"_MASK")
2065+
vti.RegClass:$rd, vti.RegClass:$rs1, GPR:$rs2,
2066+
(vti.Mask V0), GPR:$vl, vti.Log2SEW,
2067+
(XLenVT timm:$policy))>;
2068+
}
2069+
}
2070+
}
2071+
2072+
multiclass VPatSlide1VL_VX<SDNode vop, string instruction_name> {
2073+
foreach vti = AllIntegerVectors in {
2074+
let Predicates = GetVTypePredicates<vti>.Predicates in {
2075+
def : Pat<(vti.Vector (vop (vti.Vector vti.RegClass:$rs3),
2076+
(vti.Vector vti.RegClass:$rs1),
2077+
GPR:$rs2, (vti.Mask V0), VLOpFrag)),
2078+
(!cast<Instruction>(instruction_name#"_VX_"#vti.LMul.MX#"_MASK")
2079+
vti.RegClass:$rs3, vti.RegClass:$rs1, GPR:$rs2,
2080+
(vti.Mask V0), GPR:$vl, vti.Log2SEW, TU_MU)>;
2081+
}
2082+
}
2083+
}
2084+
2085+
multiclass VPatSlide1VL_VF<SDNode vop, string instruction_name> {
2086+
foreach vti = AllFloatVectors in {
2087+
let Predicates = GetVTypePredicates<vti>.Predicates in {
2088+
def : Pat<(vti.Vector (vop (vti.Vector vti.RegClass:$rs3),
2089+
(vti.Vector vti.RegClass:$rs1),
2090+
vti.Scalar:$rs2, (vti.Mask V0), VLOpFrag)),
2091+
(!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX#"_MASK")
2092+
vti.RegClass:$rs3, vti.RegClass:$rs1, vti.Scalar:$rs2,
2093+
(vti.Mask V0), GPR:$vl, vti.Log2SEW, TU_MU)>;
2094+
}
2095+
}
2096+
}
2097+
20482098
//===----------------------------------------------------------------------===//
20492099
// Patterns.
20502100
//===----------------------------------------------------------------------===//
@@ -2937,70 +2987,12 @@ foreach vti = AllIntegerVectors in {
29372987
(!cast<Instruction>("PseudoVID_V_"#vti.LMul.MX#"_MASK")
29382988
(vti.Vector (IMPLICIT_DEF)), (vti.Mask V0), GPR:$vl, vti.Log2SEW,
29392989
TAIL_AGNOSTIC)>;
2940-
def : Pat<(vti.Vector (riscv_slide1up_vl (vti.Vector vti.RegClass:$rd),
2941-
(vti.Vector vti.RegClass:$rs1),
2942-
GPR:$rs2, (vti.Mask true_mask),
2943-
VLOpFrag)),
2944-
(!cast<Instruction>("PseudoVSLIDE1UP_VX_"#vti.LMul.MX)
2945-
vti.RegClass:$rd, vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
2946-
def : Pat<(vti.Vector (riscv_slide1down_vl (vti.Vector vti.RegClass:$rd),
2947-
(vti.Vector vti.RegClass:$rs1),
2948-
GPR:$rs2, (vti.Mask true_mask),
2949-
VLOpFrag)),
2950-
(!cast<Instruction>("PseudoVSLIDE1DOWN_VX_"#vti.LMul.MX)
2951-
vti.RegClass:$rd, vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
29522990
}
29532991
}
29542992

2955-
foreach vti = AllFloatVectors in {
2956-
let Predicates = GetVTypePredicates<vti>.Predicates in {
2957-
def : Pat<(vti.Vector (riscv_fslide1up_vl (vti.Vector vti.RegClass:$rd),
2958-
(vti.Vector vti.RegClass:$rs1),
2959-
vti.Scalar:$rs2, (vti.Mask true_mask),
2960-
VLOpFrag)),
2961-
(!cast<Instruction>("PseudoVFSLIDE1UP_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
2962-
vti.RegClass:$rd, vti.RegClass:$rs1, vti.ScalarRegClass:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
2963-
def : Pat<(vti.Vector (riscv_fslide1down_vl (vti.Vector vti.RegClass:$rd),
2964-
(vti.Vector vti.RegClass:$rs1),
2965-
vti.Scalar:$rs2, (vti.Mask true_mask),
2966-
VLOpFrag)),
2967-
(!cast<Instruction>("PseudoVFSLIDE1DOWN_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
2968-
vti.RegClass:$rd, vti.RegClass:$rs1, vti.ScalarRegClass:$rs2, GPR:$vl, vti.Log2SEW, TU_MU)>;
2969-
}
2970-
}
2971-
2972-
foreach vti = AllVectors in {
2973-
let Predicates = GetVTypePredicates<vti>.Predicates in {
2974-
def : Pat<(vti.Vector (riscv_slideup_vl (vti.Vector vti.RegClass:$rs3),
2975-
(vti.Vector vti.RegClass:$rs1),
2976-
uimm5:$rs2, (vti.Mask true_mask),
2977-
VLOpFrag, (XLenVT timm:$policy))),
2978-
(!cast<Instruction>("PseudoVSLIDEUP_VI_"#vti.LMul.MX)
2979-
vti.RegClass:$rs3, vti.RegClass:$rs1, uimm5:$rs2,
2980-
GPR:$vl, vti.Log2SEW, (XLenVT timm:$policy))>;
2981-
2982-
def : Pat<(vti.Vector (riscv_slideup_vl (vti.Vector vti.RegClass:$rs3),
2983-
(vti.Vector vti.RegClass:$rs1),
2984-
GPR:$rs2, (vti.Mask true_mask),
2985-
VLOpFrag, (XLenVT timm:$policy))),
2986-
(!cast<Instruction>("PseudoVSLIDEUP_VX_"#vti.LMul.MX)
2987-
vti.RegClass:$rs3, vti.RegClass:$rs1, GPR:$rs2,
2988-
GPR:$vl, vti.Log2SEW, (XLenVT timm:$policy))>;
2989-
2990-
def : Pat<(vti.Vector (riscv_slidedown_vl (vti.Vector vti.RegClass:$rs3),
2991-
(vti.Vector vti.RegClass:$rs1),
2992-
uimm5:$rs2, (vti.Mask true_mask),
2993-
VLOpFrag, (XLenVT timm:$policy))),
2994-
(!cast<Instruction>("PseudoVSLIDEDOWN_VI_"#vti.LMul.MX)
2995-
vti.RegClass:$rs3, vti.RegClass:$rs1, uimm5:$rs2,
2996-
GPR:$vl, vti.Log2SEW, (XLenVT timm:$policy))>;
2997-
2998-
def : Pat<(vti.Vector (riscv_slidedown_vl (vti.Vector vti.RegClass:$rs3),
2999-
(vti.Vector vti.RegClass:$rs1),
3000-
GPR:$rs2, (vti.Mask true_mask),
3001-
VLOpFrag, (XLenVT timm:$policy))),
3002-
(!cast<Instruction>("PseudoVSLIDEDOWN_VX_"#vti.LMul.MX)
3003-
vti.RegClass:$rs3, vti.RegClass:$rs1, GPR:$rs2,
3004-
GPR:$vl, vti.Log2SEW, (XLenVT timm:$policy))>;
3005-
}
3006-
}
2993+
defm : VPatSlideVL_VX_VI<riscv_slideup_vl, "PseudoVSLIDEUP">;
2994+
defm : VPatSlideVL_VX_VI<riscv_slidedown_vl, "PseudoVSLIDEDOWN">;
2995+
defm : VPatSlide1VL_VX<riscv_slide1up_vl, "PseudoVSLIDE1UP">;
2996+
defm : VPatSlide1VL_VF<riscv_fslide1up_vl, "PseudoVFSLIDE1UP">;
2997+
defm : VPatSlide1VL_VX<riscv_slide1down_vl, "PseudoVSLIDE1DOWN">;
2998+
defm : VPatSlide1VL_VF<riscv_fslide1down_vl, "PseudoVFSLIDE1DOWN">;

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