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[LV] Add tests with outisde IV users where vector region can e removed.
Tests for crash caused by initial version of #112147.
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‎llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes='loop-vectorize' -force-vector-width=8 -force-vector-interleave=2 -S %s | FileCheck --check-prefixes=CHECK %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define i64 @remove_loop_region_int_iv_used_outside(ptr %dst) {
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; CHECK-LABEL: define i64 @remove_loop_region_int_iv_used_outside(
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; CHECK-SAME: ptr [[DST:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr ptr, ptr [[DST]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr ptr, ptr [[TMP0]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr ptr, ptr [[TMP0]], i32 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP1]], align 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP2]], align 8
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; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 16, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr ptr, ptr [[DST]], i64 [[IV]]
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; CHECK-NEXT: store ptr null, ptr [[GEP]], align 8
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 16
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ], [ 15, %[[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep = getelementptr ptr, ptr %dst, i64 %iv
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store ptr null, ptr %gep, align 8
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 16
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br i1 %ec, label %exit, label %loop
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exit:
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%res = phi i64 [ %iv, %loop ]
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ret i64 %res
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}
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define i64 @remove_loop_region_int_iv_inc_used_outside(ptr %dst) {
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; CHECK-LABEL: define i64 @remove_loop_region_int_iv_inc_used_outside(
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; CHECK-SAME: ptr [[DST:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr ptr, ptr [[DST]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr ptr, ptr [[TMP0]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr ptr, ptr [[TMP0]], i32 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP1]], align 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP2]], align 8
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; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 16, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr ptr, ptr [[DST]], i64 [[IV]]
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; CHECK-NEXT: store ptr null, ptr [[GEP]], align 8
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 16
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[IV_NEXT]], %[[LOOP]] ], [ 16, %[[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep = getelementptr ptr, ptr %dst, i64 %iv
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store ptr null, ptr %gep, align 8
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 16
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br i1 %ec, label %exit, label %loop
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exit:
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%res = phi i64 [ %iv.next, %loop ]
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ret i64 %res
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}
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define ptr @remove_loop_region_ptr_iv_used_outside(ptr %dst) {
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; CHECK-LABEL: define ptr @remove_loop_region_ptr_iv_used_outside(
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; CHECK-SAME: ptr [[DST:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[DST]], i64 128
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr ptr, ptr [[NEXT_GEP]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr ptr, ptr [[NEXT_GEP]], i32 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP1]], align 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP2]], align 8
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; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: [[IND_ESCAPE:%.*]] = getelementptr i8, ptr [[TMP0]], i64 -8
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[TMP0]], %[[MIDDLE_BLOCK]] ], [ [[DST]], %[[ENTRY]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i64 [ 16, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[PTR_IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[INT_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[INT_IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: store ptr null, ptr [[PTR_IV]], align 8
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; CHECK-NEXT: [[INT_IV_NEXT]] = add i64 [[INT_IV]], 1
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; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr i8, ptr [[PTR_IV]], i64 8
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[INT_IV_NEXT]], 16
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi ptr [ [[PTR_IV]], %[[LOOP]] ], [ [[IND_ESCAPE]], %[[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret ptr [[RES]]
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;
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entry:
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br label %loop
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loop:
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%ptr.iv = phi ptr [ %dst, %entry ], [ %ptr.iv.next, %loop ]
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%int.iv = phi i64 [ 0, %entry ], [ %int.iv.next, %loop ]
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store ptr null, ptr %ptr.iv, align 8
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%int.iv.next = add i64 %int.iv, 1
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%ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 8
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%ec = icmp eq i64 %int.iv.next, 16
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br i1 %ec, label %exit, label %loop
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exit:
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%res = phi ptr [ %ptr.iv, %loop ]
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ret ptr %res
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}
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define ptr @remove_loop_region_ptr_iv_inc_used_outside(ptr %dst) {
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; CHECK-LABEL: define ptr @remove_loop_region_ptr_iv_inc_used_outside(
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; CHECK-SAME: ptr [[DST:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[DST]], i64 128
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 0
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr ptr, ptr [[NEXT_GEP]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr ptr, ptr [[NEXT_GEP]], i32 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP1]], align 8
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; CHECK-NEXT: store <8 x ptr> zeroinitializer, ptr [[TMP2]], align 8
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; CHECK-NEXT: br label %[[MIDDLE_BLOCK:.*]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[TMP0]], %[[MIDDLE_BLOCK]] ], [ [[DST]], %[[ENTRY]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i64 [ 16, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[PTR_IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[INT_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[INT_IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: store ptr null, ptr [[PTR_IV]], align 8
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; CHECK-NEXT: [[INT_IV_NEXT]] = add i64 [[INT_IV]], 1
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; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr i8, ptr [[PTR_IV]], i64 8
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[INT_IV_NEXT]], 16
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi ptr [ [[PTR_IV_NEXT]], %[[LOOP]] ], [ [[TMP0]], %[[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret ptr [[RES]]
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;
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entry:
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br label %loop
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loop:
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%ptr.iv = phi ptr [ %dst, %entry ], [ %ptr.iv.next, %loop ]
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%int.iv = phi i64 [ 0, %entry ], [ %int.iv.next, %loop ]
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store ptr null, ptr %ptr.iv, align 8
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%int.iv.next = add i64 %int.iv, 1
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%ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 8
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%ec = icmp eq i64 %int.iv.next, 16
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br i1 %ec, label %exit, label %loop
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exit:
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%res = phi ptr [ %ptr.iv.next, %loop ]
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ret ptr %res
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}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
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; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
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;.

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