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AddressSpace and void ptr fix
1 parent 3f93ae9 commit 80d33eb

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2 files changed

+41
-21
lines changed

2 files changed

+41
-21
lines changed

‎llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp

Lines changed: 27 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
#include "SPIRVGlobalRegistry.h"
55
#include "SPIRVRegisterInfo.h"
66
#include "SPIRVTargetMachine.h"
7+
#include "SPIRVUtils.h"
78
#include "llvm/ADT/SmallPtrSet.h"
89
#include "llvm/ADT/SmallString.h"
910
#include "llvm/BinaryFormat/Dwarf.h"
@@ -140,10 +141,9 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
140141
// pointed on from other DI types
141142
// DerivedType->getBaseType is null when pointer
142143
// is representing a void type
143-
if (DerivedType->getBaseType()) {
144+
if (DerivedType->getBaseType())
144145
BasicTypes.insert(
145146
cast<DIBasicType>(DerivedType->getBaseType()));
146-
}
147147
}
148148
}
149149
}
@@ -271,21 +271,36 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
271271
}
272272

273273
if (PointerDerivedTypes.size()) {
274-
const Register GenericStorageClass =
275-
GR->buildConstantInt(8, MIRBuilder, I32Ty, false);
276274
for (const auto *PointerDerivedType : PointerDerivedTypes) {
275+
276+
assert(PointerDerivedType->getDWARFAddressSpace().has_value());
277+
const Register StorageClassReg = GR->buildConstantInt(
278+
addressSpaceToStorageClass(
279+
PointerDerivedType->getDWARFAddressSpace().value(),
280+
*TM->getSubtargetImpl()),
281+
MIRBuilder, I32Ty, false);
282+
277283
// If the Pointer is representing a void type it's getBaseType
278284
// is a nullptr
279-
const auto *MaybeBT =
285+
const auto *MaybeNestedBasicType =
280286
cast_or_null<DIBasicType>(PointerDerivedType->getBaseType());
281-
for (const auto &BasicTypeRegPair : BasicTypeRegPairs) {
282-
const auto &[SBT, Reg] = BasicTypeRegPair;
283-
if (SBT == MaybeBT) {
284-
[[maybe_unused]]
285-
const Register DebugPointerTypeReg =
286-
EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypePointer,
287-
{Reg, GenericStorageClass, I32ZeroReg});
287+
if (MaybeNestedBasicType) {
288+
for (const auto &BasicTypeRegPair : BasicTypeRegPairs) {
289+
const auto &[DefinedBasicType, BasicTypeReg] = BasicTypeRegPair;
290+
if (DefinedBasicType == MaybeNestedBasicType) {
291+
[[maybe_unused]]
292+
const Register DebugPointerTypeReg = EmitDIInstruction(
293+
SPIRV::NonSemanticExtInst::DebugTypePointer,
294+
{BasicTypeReg, StorageClassReg, I32ZeroReg});
295+
}
288296
}
297+
} else {
298+
const Register DebugInfoNoneReg =
299+
EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone, {});
300+
[[maybe_unused]]
301+
const Register DebugPointerTypeReg = EmitDIInstruction(
302+
SPIRV::NonSemanticExtInst::DebugTypePointer,
303+
{DebugInfoNoneReg, StorageClassReg, I32ZeroReg});
289304
}
290305
}
291306
}

‎llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll

Lines changed: 14 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,21 @@
11
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
22
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
33
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
4-
; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
4+
; When type is void * the spirv-val incorrectly raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
5+
; DISABLED: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
56

67
; CHECK-MIR-DAG: [[i32type:%[0-9]+\:type]] = OpTypeInt 32, 0
78
; CHECK-MIR-DAG: [[void_type:%[0-9]+\:type\(s64\)]] = OpTypeVoid
89
; CHECK-MIR-DAG: [[i32_8:%[0-9]+\:iid]] = OpConstantI [[i32type]], 8
910
; CHECK-MIR-DAG: [[i32_0:%[0-9]+\:iid]] = OpConstantI [[i32type]], 0
10-
; CHECK-MIR-DAG: [[enc_signed_char:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 5
11+
; CHECK-MIR-DAG: [[i32_5:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 5
1112
; CHECK-MIR-DAG: [[enc_float:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 3
1213
; CHECK-MIR-DAG: [[enc_boolean:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 2
1314
; CHECK-MIR-DAG: [[bool:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[enc_boolean]], [[i32_0]]
1415
; CHECK-MIR-DAG: [[i32_16:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 16
1516
; CHECK-MIR-DAG: [[enc_signed:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 4
1617
; CHECK-MIR-DAG: [[short:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_16]], [[enc_signed]], [[i32_0]]
17-
; CHECK-MIR-DAG: [[char:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[enc_signed_char]], [[i32_0]]
18+
; CHECK-MIR-DAG: [[char:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[i32_5]], [[i32_0]]
1819
; CHECK-MIR-DAG: [[i32_64:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 64
1920
; CHECK-MIR-DAG: [[long:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_64]], [[enc_signed]], [[i32_0]]
2021
; CHECK-MIR-DAG: [[i32_32:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 32
@@ -37,12 +38,14 @@
3738
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[unsigned_long]], [[i32_8]], [[i32_0]]
3839
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[float]], [[i32_8]], [[i32_0]]
3940
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[double]], [[i32_8]], [[i32_0]]
40-
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[int]], [[i32_8]], [[i32_0]]
41+
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[int]], [[i32_5]], [[i32_0]]
42+
; CHECK-MIR: [[debug_info_none:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 0
43+
; CHECK-MIR: OpExtInst [[void_type]], 3, 3, [[debug_info_none]], [[i32_5]], [[i32_0]]
4144

4245
; CHECK-SPIRV: [[i32type:%[0-9]+]] = OpTypeInt 32 0
4346
; CHECK-SPIRV-DAG: [[i32_8:%[0-9]+]] = OpConstant [[i32type]] 8
4447
; CHECK-SPIRV-DAG: [[i32_0:%[0-9]+]] = OpConstant [[i32type]] 0
45-
; CHECK-SPIRV-DAG: [[enc_signed_char:%[0-9]+]] = OpConstant [[i32type]] 5
48+
; CHECK-SPIRV-DAG: [[i32_5:%[0-9]+]] = OpConstant [[i32type]] 5
4649
; CHECK-SPIRV-DAG: [[enc_float:%[0-9]+]] = OpConstant [[i32type]] 3
4750
; CHECK-SPIRV-DAG: [[enc_boolean:%[0-9]+]] = OpConstant [[i32type]] 2
4851
; CHECK-SPIRV-DAG: [[i32_16:%[0-9]+]] = OpConstant [[i32type]] 16
@@ -53,7 +56,7 @@
5356
; CHECK-SPIRV-DAG: [[enc_unsigned_char:%[0-9]+]] = OpConstant [[i32type]] 7
5457
; CHECK-SPIRV-DAG: [[bool:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_8]] [[enc_boolean]] [[i32_0]]
5558
; CHECK-SPIRV-DAG: [[short:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_16]] [[enc_signed]] [[i32_0]]
56-
; CHECK-SPIRV-DAG: [[char:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_8]] [[enc_signed_char]] [[i32_0]]
59+
; CHECK-SPIRV-DAG: [[char:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_8]] [[i32_5]] [[i32_0]]
5760
; CHECK-SPIRV-DAG: [[long:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_64]] [[enc_signed]] [[i32_0]]
5861
; CHECK-SPIRV-DAG: [[unsigned_int:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_32]] [[enc_unsigned]] [[i32_0]]
5962
; CHECK-SPIRV-DAG: [[unsigned_short:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypeBasic {{%[0-9]+}} [[i32_16]] [[enc_unsigned]] [[i32_0]]
@@ -72,7 +75,9 @@
7275
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[unsigned_long]] [[i32_8]] [[i32_0]]
7376
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[float]] [[i32_8]] [[i32_0]]
7477
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[double]] [[i32_8]] [[i32_0]]
75-
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[int]] [[i32_8]] [[i32_0]]
78+
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[int]] [[i32_5]] [[i32_0]]
79+
; CHECK-SPIRV-DAG: [[debug_info_none:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugInfoNone
80+
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[debug_info_none]] [[i32_5]] [[i32_0]]
7681

7782
; CHECK-OPTION-NOT: DebugTypePointer
7883

@@ -179,8 +184,8 @@ define spir_func i32 @test1() !dbg !72 {
179184
!4 = !{!0, !5}
180185
!5 = !DIGlobalVariableExpression(var: !6, expr: !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef))
181186
!6 = distinct !DIGlobalVariable(name: "gv0", scope: !2, file: !3, line: 3, type: !7, isLocal: false, isDefinition: true)
182-
!7 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 32, dwarfAddressSpace: 4)
183-
!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 32, dwarfAddressSpace: 4)
187+
!7 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 32, dwarfAddressSpace: 1)
188+
!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 32, dwarfAddressSpace: 1)
184189
!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
185190
!10 = !{i32 7, !"Dwarf Version", i32 5}
186191
!11 = !{i32 2, !"Debug Info Version", i32 3}

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