Skip to content

Commit 76e5c51

Browse files
shiltianshiltian
committed
[Attributor][AMD] Enable AAIndirectCallInfo for AMDAttributorPass
1 parent 366eade commit 76e5c51

File tree

9 files changed

+107
-17
lines changed

9 files changed

+107
-17
lines changed

‎llvm/include/llvm/Transforms/IPO/Attributor.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1448,7 +1448,7 @@ struct AttributorConfig {
14481448
/// Callback function to determine if an indirect call targets should be made
14491449
/// direct call targets (with an if-cascade).
14501450
std::function<bool(Attributor &A, const AbstractAttribute &AA, CallBase &CB,
1451-
Function &AssummedCallee)>
1451+
Function &AssummedCallee, unsigned NumAssummedCallee)>
14521452
IndirectCalleeSpecializationCallback = nullptr;
14531453

14541454
/// Helper to update an underlying call graph and to delete functions.
@@ -1718,10 +1718,11 @@ struct Attributor {
17181718
/// Return true if we should specialize the call site \b CB for the potential
17191719
/// callee \p Fn.
17201720
bool shouldSpecializeCallSiteForCallee(const AbstractAttribute &AA,
1721-
CallBase &CB, Function &Callee) {
1721+
CallBase &CB, Function &Callee,
1722+
unsigned NumAssummedCallee) {
17221723
return Configuration.IndirectCalleeSpecializationCallback
1723-
? Configuration.IndirectCalleeSpecializationCallback(*this, AA,
1724-
CB, Callee)
1724+
? Configuration.IndirectCalleeSpecializationCallback(
1725+
*this, AA, CB, Callee, NumAssummedCallee)
17251726
: true;
17261727
}
17271728

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp‎

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include "GCNSubtarget.h"
1515
#include "Utils/AMDGPUBaseInfo.h"
1616
#include "llvm/Analysis/CycleAnalysis.h"
17+
#include "llvm/Analysis/TargetTransformInfo.h"
1718
#include "llvm/CodeGen/TargetPassConfig.h"
1819
#include "llvm/IR/IntrinsicsAMDGPU.h"
1920
#include "llvm/IR/IntrinsicsR600.h"
@@ -1038,12 +1039,24 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM) {
10381039
&AAPotentialValues::ID, &AAAMDFlatWorkGroupSize::ID,
10391040
&AAAMDWavesPerEU::ID, &AAAMDGPUNoAGPR::ID, &AACallEdges::ID,
10401041
&AAPointerInfo::ID, &AAPotentialConstantValues::ID,
1041-
&AAUnderlyingObjects::ID});
1042+
&AAUnderlyingObjects::ID, &AAIndirectCallInfo::ID, &AAInstanceInfo::ID});
10421043

10431044
AttributorConfig AC(CGUpdater);
10441045
AC.Allowed = &Allowed;
10451046
AC.IsModulePass = true;
10461047
AC.DefaultInitializeLiveInternals = false;
1048+
AC.IndirectCalleeSpecializationCallback =
1049+
[&TM](Attributor &A, const AbstractAttribute &AA, CallBase &CB,
1050+
Function &Callee, unsigned NumAssummedCallee) {
1051+
if (AMDGPU::isEntryFunctionCC(Callee.getCallingConv()))
1052+
return false;
1053+
// Singleton functions can be specialized.
1054+
if (NumAssummedCallee == 1)
1055+
return true;
1056+
// Otherwise specialize uniform values.
1057+
const auto &TTI = TM.getTargetTransformInfo(*CB.getCaller());
1058+
return TTI.isAlwaysUniform(CB.getCalledOperand());
1059+
};
10471060
AC.IPOAmendableCB = [](const Function &F) {
10481061
return F.getCallingConv() == CallingConv::AMDGPU_KERNEL;
10491062
};

‎llvm/lib/Transforms/IPO/Attributor.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3836,7 +3836,7 @@ static bool runAttributorOnFunctions(InformationCache &InfoCache,
38363836
if (MaxSpecializationPerCB.getNumOccurrences()) {
38373837
AC.IndirectCalleeSpecializationCallback =
38383838
[&](Attributor &, const AbstractAttribute &AA, CallBase &CB,
3839-
Function &Callee) {
3839+
Function &Callee, unsigned) {
38403840
if (MaxSpecializationPerCB == 0)
38413841
return false;
38423842
auto &Set = IndirectCalleeTrackingMap[&CB];

‎llvm/lib/Transforms/IPO/AttributorAttributes.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12347,7 +12347,8 @@ struct AAIndirectCallInfoCallSite : public AAIndirectCallInfo {
1234712347
SmallVector<Function *, 8> SkippedAssumedCallees;
1234812348
SmallVector<std::pair<CallInst *, Instruction *>> NewCalls;
1234912349
for (Function *NewCallee : AssumedCallees) {
12350-
if (!A.shouldSpecializeCallSiteForCallee(*this, *CB, *NewCallee)) {
12350+
if (!A.shouldSpecializeCallSiteForCallee(*this, *CB, *NewCallee,
12351+
AssumedCallees.size())) {
1235112352
SkippedAssumedCallees.push_back(NewCallee);
1235212353
SpecializedForAllCallees = false;
1235312354
continue;

‎llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -231,7 +231,7 @@ define amdgpu_kernel void @indirect_calls_none_agpr(i1 %cond) {
231231
; CHECK-LABEL: define amdgpu_kernel void @indirect_calls_none_agpr(
232232
; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR0]] {
233233
; CHECK-NEXT: [[FPTR:%.*]] = select i1 [[COND]], ptr @empty, ptr @also_empty
234-
; CHECK-NEXT: call void [[FPTR]]()
234+
; CHECK-NEXT: call void [[FPTR]](), !callees [[META0:![0-9]+]]
235235
; CHECK-NEXT: ret void
236236
;
237237
%fptr = select i1 %cond, ptr @empty, ptr @also_empty
@@ -253,3 +253,5 @@ attributes #0 = { "amdgpu-no-agpr" }
253253
; CHECK: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) "target-cpu"="gfx90a" }
254254
; CHECK: attributes #[[ATTR9]] = { "amdgpu-no-agpr" }
255255
;.
256+
; CHECK: [[META0]] = !{ptr @also_empty, ptr @empty}
257+
;.

‎llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define internal void @direct() {
1515
; CHECK-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5)
1616
; CHECK-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8
1717
; CHECK-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8
18-
; CHECK-NEXT: call void [[FP]]()
18+
; CHECK-NEXT: call void @indirect()
1919
; CHECK-NEXT: ret void
2020
;
2121
%fptr = alloca ptr, addrspace(5)
@@ -36,5 +36,5 @@ define amdgpu_kernel void @test_direct_indirect_call() {
3636
}
3737
;.
3838
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
39-
; CHECK: attributes #[[ATTR1]] = { "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
39+
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
4040
;.

‎llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ define amdgpu_kernel void @test_simple_indirect_call() #0 {
2727
; ATTRIBUTOR_GCN-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5)
2828
; ATTRIBUTOR_GCN-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8
2929
; ATTRIBUTOR_GCN-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8
30-
; ATTRIBUTOR_GCN-NEXT: call void [[FP]]()
30+
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
3131
; ATTRIBUTOR_GCN-NEXT: ret void
3232
;
3333
%fptr = alloca ptr, addrspace(5)
@@ -43,5 +43,5 @@ attributes #0 = { "amdgpu-no-dispatch-id" }
4343
; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-no-dispatch-id" "amdgpu-stack-objects" }
4444
;.
4545
; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
46-
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-dispatch-id" "uniform-work-group-size"="false" }
46+
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
4747
;.

‎llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll‎

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,69 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
2+
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor %s | FileCheck --check-prefixes=CHECK,OW %s
3+
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor -attributor-assume-closed-world=1 %s | FileCheck --check-prefixes=CHECK,CW %s
4+
5+
target datalayout = "A5"
6+
7+
@G = global i32 0, align 4
8+
9+
;.
10+
; CHECK: @G = global i32 0, align 4
11+
;.
12+
define void @bar() {
13+
; CHECK-LABEL: define {{[^@]+}}@bar
14+
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
15+
; CHECK-NEXT: entry:
16+
; CHECK-NEXT: store i32 1, ptr @G, align 4
17+
; CHECK-NEXT: ret void
18+
;
19+
entry:
20+
store i32 1, ptr @G, align 4
21+
ret void
22+
}
23+
24+
define ptr @helper() {
25+
; CHECK-LABEL: define {{[^@]+}}@helper
26+
; CHECK-SAME: () #[[ATTR0]] {
27+
; CHECK-NEXT: entry:
28+
; CHECK-NEXT: ret ptr @bar
29+
;
30+
entry:
31+
ret ptr @bar
32+
}
33+
34+
define amdgpu_kernel void @foo(ptr noundef %fp) {
35+
; OW-LABEL: define {{[^@]+}}@foo
36+
; OW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
37+
; OW-NEXT: entry:
38+
; OW-NEXT: [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
39+
; OW-NEXT: [[FPTR_CAST:%.*]] = addrspacecast ptr addrspace(5) [[FP_ADDR]] to ptr
40+
; OW-NEXT: store ptr [[FP]], ptr [[FPTR_CAST]], align 8
41+
; OW-NEXT: call void [[FP]]()
42+
; OW-NEXT: ret void
43+
;
44+
; CW-LABEL: define {{[^@]+}}@foo
45+
; CW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
46+
; CW-NEXT: entry:
47+
; CW-NEXT: [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
48+
; CW-NEXT: [[FPTR_CAST:%.*]] = addrspacecast ptr addrspace(5) [[FP_ADDR]] to ptr
49+
; CW-NEXT: store ptr [[FP]], ptr [[FPTR_CAST]], align 8
50+
; CW-NEXT: [[TMP0:%.*]] = load ptr, ptr [[FPTR_CAST]], align 8
51+
; CW-NEXT: call void @bar()
52+
; CW-NEXT: ret void
53+
;
54+
entry:
55+
%fp.addr = alloca ptr, addrspace(5)
56+
%fptr.cast = addrspacecast ptr addrspace(5) %fp.addr to ptr
57+
store ptr %fp, ptr %fptr.cast
58+
%0 = load ptr, ptr %fptr.cast
59+
call void %0()
60+
ret void
61+
}
62+
63+
;.
64+
; OW: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
65+
; OW: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
66+
;.
67+
; CW: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
68+
; CW: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
69+
;.

‎llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll‎

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ define amdgpu_kernel void @test_simple_indirect_call() {
3737
; ATTRIBUTOR_GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast ptr addrspace(5) [[FPTR]] to ptr
3838
; ATTRIBUTOR_GCN-NEXT: store ptr @indirect, ptr [[FPTR_CAST]], align 8
3939
; ATTRIBUTOR_GCN-NEXT: [[FP:%.*]] = load ptr, ptr [[FPTR_CAST]], align 8
40-
; ATTRIBUTOR_GCN-NEXT: call void [[FP]]()
40+
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
4141
; ATTRIBUTOR_GCN-NEXT: ret void
4242
;
4343
; GFX9-LABEL: test_simple_indirect_call:
@@ -75,12 +75,16 @@ define amdgpu_kernel void @test_simple_indirect_call() {
7575
ret void
7676
}
7777

78+
79+
!llvm.module.flags = !{!0}
80+
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
7881
;.
7982
; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-stack-objects" }
8083
;.
8184
; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
82-
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
85+
; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
86+
;.
87+
; AKF_GCN: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
88+
;.
89+
; ATTRIBUTOR_GCN: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
8390
;.
84-
85-
!llvm.module.flags = !{!0}
86-
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}

0 commit comments

Comments
 (0)