Fix misscompile

Author: andjo403

llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp

@@ -1339,6 +1339,7 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
     auto *Input = cast<ConstantInt>(std::get<0>(Pair));
     BasicBlock *Pred = std::get<1>(Pair);
     auto IsCorrectInput = [&](ConstantInt *Input) {
+      Instruction::CastOps TempCastType = CastType;
       if (CastType != Instruction::BitCast) {
         APInt InputValue = Input->getValue();
         if (CastType == Instruction::Trunc)
@@ -1347,7 +1348,7 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
                  InputValue.isIntN(CondBitWidth))
           InputValue = InputValue.trunc(CondBitWidth);
         else if (InputValue.isSignedIntN(CondBitWidth)) {
-          CastType = Instruction::SExt;
+          TempCastType = Instruction::SExt;
           InputValue = InputValue.trunc(CondBitWidth);
         } else
           return false;
@@ -1357,9 +1358,12 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
       // This edge cannot be a multi-edge, as that would imply that multiple
       // different condition values follow the same edge.
       auto It = SuccForValue.find(Input);
-      return It != SuccForValue.end() && SuccCount[It->second] == 1 &&
-             DT.dominates(BasicBlockEdge(IDom, It->second),
-                          BasicBlockEdge(Pred, BB));
+      bool Result = It != SuccForValue.end() && SuccCount[It->second] == 1 &&
+                    DT.dominates(BasicBlockEdge(IDom, It->second),
+                                 BasicBlockEdge(Pred, BB));
+      if (Result)
+        CastType = TempCastType;
+      return Result;
     };
 
     // Depending on the constant, the condition may need to be inverted.

llvm/test/Transforms/InstCombine/simple_phi_condition.ll

@@ -713,8 +713,8 @@ define i32 @test_phi_to_zext_inverted(i8 noundef %0) {
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br label [[BB5]]
 ; CHECK:       bb5:
-; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[TMP0]], -1
-; CHECK-NEXT:    [[DOT0:%.*]] = sext i8 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[TMP0]] to i32
+; CHECK-NEXT:    [[DOT0:%.*]] = xor i32 [[TMP1]], -1
 ; CHECK-NEXT:    ret i32 [[DOT0]]
 ;
 start: